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authorAndrew Lenharth <andrewl@lenharth.org>2008-02-16 01:24:58 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2008-02-16 01:24:58 +0000
commit22c5c1b2dfcb1da6a7ebfebea903401fc77d56e6 (patch)
tree2e65d654e3f499c5538ca7ef024a0c7c76f9d3f4 /include/llvm
parent527c250a9080a5b6cf0053a6215037c3769ff4a0 (diff)
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llvm.memory.barrier, and impl for x86 and alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h8
-rw-r--r--include/llvm/Intrinsics.td5
2 files changed, 13 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 4f56b9b..415e291 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -589,6 +589,14 @@ namespace ISD {
// TRAP - Trapping instruction
TRAP,
+ // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,
+ // store-store, device)
+ // This corresponds to the atomic.barrier intrinsic.
+ // it takes an input chain, 4 operands to specify the type of barrier, an
+ // operand specifying if the barrier applies to device and uncached memory
+ // and produces an output chain.
+ MEMBARRIER,
+
// BUILTIN_OP_END - This must be the last enum value in this list.
BUILTIN_OP_END
};
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index 703b794..64b3abf 100644
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -262,6 +262,11 @@ def int_init_trampoline : Intrinsic<[llvm_ptr_ty, llvm_ptr_ty, llvm_ptr_ty,
llvm_ptr_ty], []>,
GCCBuiltin<"__builtin_init_trampoline">;
+//===------------------------- Atomic Intrinsics --------------------------===//
+//
+def int_memory_barrier : Intrinsic<[llvm_void_ty, llvm_i1_ty, llvm_i1_ty,
+ llvm_i1_ty, llvm_i1_ty, llvm_i1_ty], []>;
+
//===-------------------------- Other Intrinsics --------------------------===//
//
def int_flt_rounds : Intrinsic<[llvm_i32_ty]>,