Continue Alkis's int64_t cleanup. This makes all of the immediate related

methods take an int or unsigned value instead of int64_t.

Also, add an 'addImm' method to the MachineInstrBuilder class, because the
fact that the hardware sign or zero extends it does not/should not matter
to the code generator.  Once the old sparc backend is removed the difference
can be eliminated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11976 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 22 insertions, 16 deletions

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index c63fa85..7545fcb 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -128,7 +128,7 @@ private:
   int regNum;	                // register number for an explicit register
                                 // will be set for a value after reg allocation
 private:
-  MachineOperand(int64_t ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
+  MachineOperand(int ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
     : immedVal(ImmVal),
       flags(0),
       opType(OpTy),
@@ -228,8 +228,8 @@ public:
     assert(opType == MO_MachineRegister);
     return regNum;
   }
-  int64_t getImmedValue() const { assert(isImmediate()); return immedVal; }
-  void setImmedValue(int64_t ImmVal) { assert(isImmediate()); immedVal=ImmVal; }
+  int getImmedValue() const { assert(isImmediate()); return immedVal; }
+  void setImmedValue(int ImmVal) { assert(isImmediate()); immedVal = ImmVal; }
 
   MachineBasicBlock *getMachineBasicBlock() const {
     assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
@@ -522,7 +522,7 @@ public:
   /// addZeroExtImmOperand - Add a zero extended constant argument to the
   /// machine instruction.
   ///
-  void addZeroExtImmOperand(int64_t intValue) {
+  void addZeroExtImmOperand(int intValue) {
     assert(!OperandsComplete() &&
            "Trying to add an operand to a machine instr that is already done!");
     operands.push_back(
@@ -532,7 +532,7 @@ public:
   /// addSignExtImmOperand - Add a zero extended constant argument to the
   /// machine instruction.
   ///
-  void addSignExtImmOperand(int64_t intValue) {
+  void addSignExtImmOperand(int intValue) {
     assert(!OperandsComplete() &&
            "Trying to add an operand to a machine instr that is already done!");
     operands.push_back(
@@ -600,13 +600,13 @@ public:
 
   // Access to set the operands when building the machine instruction
   // 
-  void SetMachineOperandVal     (unsigned i,
-                                 MachineOperand::MachineOperandType operandType,
-                                 Value* V);
+  void SetMachineOperandVal(unsigned i,
+                            MachineOperand::MachineOperandType operandType,
+                            Value* V);
 
-  void SetMachineOperandConst   (unsigned i,
-                                 MachineOperand::MachineOperandType operandType,
-                                 int64_t intValue);
+  void SetMachineOperandConst(unsigned i,
+                              MachineOperand::MachineOperandType operandType,
+                              int intValue);
 
   void SetMachineOperandReg(unsigned i, int regNum);
 
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index 9f06678..4d63d99 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -80,23 +80,29 @@ public:
 
   /// addMReg - Add a machine register operand...
   ///
-  const MachineInstrBuilder &addMReg(
-    int Reg,
-    MachineOperand::UseType Ty = MachineOperand::Use) const {
+  const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
+                                        = MachineOperand::Use) const {
     MI->addMachineRegOperand(Reg, Ty);
     return *this;
   }
+  
+  /// addImm - Add a new immediate operand.
+  ///
+  const MachineInstrBuilder &addImm(int Val) const {
+    MI->addZeroExtImmOperand(Val);
+    return *this;
+  }
 
   /// addSImm - Add a new sign extended immediate operand...
   ///
-  const MachineInstrBuilder &addSImm(int64_t val) const {
+  const MachineInstrBuilder &addSImm(int val) const {
     MI->addSignExtImmOperand(val);
     return *this;
   }
 
   /// addZImm - Add a new zero extended immediate operand...
   ///
-  const MachineInstrBuilder &addZImm(int64_t Val) const {
+  const MachineInstrBuilder &addZImm(unsigned Val) const {
     MI->addZeroExtImmOperand(Val);
     return *this;
   }