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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-18 22:54:47 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-18 22:54:47 +0000
commiteda6806f6aaec9a64707a8e5609ae21b15e1440a (patch)
tree59e74e4366025d55af7869fd05d529fabaaabbdc /include/llvm
parent89fb46b00b3579fb25c1d14a6dac235bb8d26146 (diff)
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--added methods to operand class to set/get registers after register allocation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@633 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
-rw-r--r--include/llvm/CodeGen/MachineInstr.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 66e91b2..fa96a53 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -83,7 +83,7 @@ private:
int64_t immedVal; // constant value for an explicit constant
};
- unsigned int regNum; // register number for an explicit register
+ unsigned regNum; // register number for an explicit register
// will be set for a value after reg allocation
bool isDef; // is this a defition for the value
@@ -105,7 +105,7 @@ public:
opType == MO_PCRelativeDisp);
return value;
}
- inline unsigned int getMachineRegNum() const {
+ inline unsigned int getMachineRegNum() const {
assert(opType == MO_MachineRegister);
return regNum;
}
@@ -141,14 +141,14 @@ public:
// replaces the Value with its corresponding physical register afeter
// register allocation is complete
- void setRegForValue(unsigned reg) {
+ void setRegForValue(int reg) {
assert(opType == MO_VirtualRegister || opType == MO_CCRegister);
regNum = reg;
}
// used to get the reg number if when one is allocted (must be
// called only after reg alloc)
- inline unsigned int getAllocatedRegNum() const {
+ inline unsigned getAllocatedRegNum() const {
assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
opType == MO_MachineRegister);
return regNum;