Add intrinsics for log, log2, log10, exp, exp2.

No functional change (and no FE change to generate them).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 28 insertions, 1 deletions

diff --git a/include/llvm/CodeGen/RuntimeLibcalls.h b/include/llvm/CodeGen/RuntimeLibcalls.h
index 6039446..e134e78 100644
--- a/include/llvm/CodeGen/RuntimeLibcalls.h
+++ b/include/llvm/CodeGen/RuntimeLibcalls.h
@@ -85,6 +85,26 @@ namespace RTLIB {
     SQRT_F64,
     SQRT_F80,
     SQRT_PPCF128,
+    LOG_F32,
+    LOG_F64,
+    LOG_F80,
+    LOG_PPCF128,
+    LOG2_F32,
+    LOG2_F64,
+    LOG2_F80,
+    LOG2_PPCF128,
+    LOG10_F32,
+    LOG10_F64,
+    LOG10_F80,
+    LOG10_PPCF128,
+    EXP_F32,
+    EXP_F64,
+    EXP_F80,
+    EXP_PPCF128,
+    EXP2_F32,
+    EXP2_F64,
+    EXP2_F80,
+    EXP2_PPCF128,
     SIN_F32,
     SIN_F64,
     SIN_F80,
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 387f926..a8b233c 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -426,9 +426,11 @@ namespace ISD {
     BIT_CONVERT,
     
     // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
+    // FLOG, FLOG2, FLOG10, FEXP, FEXP2,
     // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating
     // point operations. These are inspired by libm.
     FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
+    FLOG, FLOG2, FLOG10, FEXP, FEXP2,
     FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
     
     // LOAD and STORE have token chains as their first operand, then the same
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index f9cee62..dc42846 100644
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -199,7 +199,12 @@ let Properties = [IntrNoMem] in {
   def int_sin  : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>;
   def int_cos  : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; 
   def int_pow  : Intrinsic<[llvm_anyfloat_ty,
-                            LLVMMatchType<0>, LLVMMatchType<0>]>; 
+                            LLVMMatchType<0>, LLVMMatchType<0>]>;
+  def int_log  : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>;
+  def int_log10: Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>;
+  def int_log2 : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>;
+  def int_exp  : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>;
+  def int_exp2 : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>;
 }
 
 // NOTE: these are internal interfaces.