Move some of the decision logic for converting an instruction into one that sets

the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113665 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 2 insertions, 7 deletions

diff --git a/lib/CodeGen/PeepholeOptimizer.cpp b/lib/CodeGen/PeepholeOptimizer.cpp
index a4ff04b..7a1bf40 100644
--- a/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/lib/CodeGen/PeepholeOptimizer.cpp
@@ -240,16 +240,11 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
   unsigned SrcReg;
   int CmpValue;
   if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) ||
-      TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0)
-    return false;
-
-  MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg);
-  if (llvm::next(DI) != MRI->def_end())
-    // Only support one definition.
+      TargetRegisterInfo::isPhysicalRegister(SrcReg))
     return false;
 
   // Attempt to convert the defining instruction to set the "zero" flag.
-  if (TII->ConvertToSetZeroFlag(&*DI, MI, NextIter)) {
+  if (TII->ConvertToSetZeroFlag(MI, NextIter)) {
     ++NumEliminated;
     return true;
   }