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authorAnton Korobeynikov <asl@math.spbu.ru>2010-05-01 12:52:34 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2010-05-01 12:52:34 +0000
commit17458a786e4d3eeff9c66fc0ec284b763df53642 (patch)
treed9bd4e8ef9bbdc729d1cf4c93f99daf2fbab3d57 /lib/CodeGen/SelectionDAG/TargetLowering.cpp
parent1b17614a7283f903363f7c4305da6ea742d3d28b (diff)
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Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
when needed. This fixes PR7001 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102838 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 33c8d1a..8a4a1b1 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1882,10 +1882,15 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
isa<ConstantSDNode>(Op0.getOperand(1)) &&
cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) {
// If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
- if (Op0.getValueType() != VT)
+ if (Op0.getValueType().bitsGT(VT))
Op0 = DAG.getNode(ISD::AND, dl, VT,
DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
DAG.getConstant(1, VT));
+ else if (Op0.getValueType().bitsLT(VT))
+ Op0 = DAG.getNode(ISD::AND, dl, VT,
+ DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
+ DAG.getConstant(1, VT));
+
return DAG.getSetCC(dl, VT, Op0,
DAG.getConstant(0, Op0.getValueType()),
Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);