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author | Justin Holewinski <jholewinski@nvidia.com> | 2012-05-04 20:18:50 +0000 |
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committer | Justin Holewinski <jholewinski@nvidia.com> | 2012-05-04 20:18:50 +0000 |
commit | 49683f3c961379fbc088871a5d6304950f1f1cbc (patch) | |
tree | 830fa1ee9c992ef4645863d128be912ce2bfc987 /lib/Support | |
parent | 2c7e5c714c8675f757c4936a3a2132c2466a626c (diff) | |
download | external_llvm-49683f3c961379fbc088871a5d6304950f1f1cbc.zip external_llvm-49683f3c961379fbc088871a5d6304950f1f1cbc.tar.gz external_llvm-49683f3c961379fbc088871a5d6304950f1f1cbc.tar.bz2 |
This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.
The new target machines are:
nvptx (old ptx32) => 32-bit PTX
nvptx64 (old ptx64) => 64-bit PTX
The sources are based on the internal NVIDIA NVPTX back-end, and
contain more functionality than the current PTX back-end currently
provides.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Support')
-rw-r--r-- | lib/Support/Triple.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Support/Triple.cpp b/lib/Support/Triple.cpp index 44a1b38..4ee4716 100644 --- a/lib/Support/Triple.cpp +++ b/lib/Support/Triple.cpp @@ -40,6 +40,8 @@ const char *Triple::getArchTypeName(ArchType Kind) { case mblaze: return "mblaze"; case ptx32: return "ptx32"; case ptx64: return "ptx64"; + case nvptx: return "nvptx"; + case nvptx64: return "nvptx64"; case le32: return "le32"; case amdil: return "amdil"; } @@ -76,6 +78,8 @@ const char *Triple::getArchTypePrefix(ArchType Kind) { case ptx32: return "ptx"; case ptx64: return "ptx"; + case nvptx: return "nvptx"; + case nvptx64: return "nvptx"; case le32: return "le32"; case amdil: return "amdil"; } @@ -162,6 +166,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { .Case("xcore", xcore) .Case("ptx32", ptx32) .Case("ptx64", ptx64) + .Case("nvptx", nvptx) + .Case("nvptx64", nvptx64) .Case("le32", le32) .Case("amdil", amdil) .Default(UnknownArch); @@ -194,6 +200,8 @@ Triple::ArchType Triple::getArchTypeForDarwinArchName(StringRef Str) { .Case("r600", Triple::r600) .Case("ptx32", Triple::ptx32) .Case("ptx64", Triple::ptx64) + .Case("nvptx", Triple::nvptx) + .Case("nvptx64", Triple::nvptx64) .Case("amdil", Triple::amdil) .Default(Triple::UnknownArch); } @@ -217,6 +225,8 @@ const char *Triple::getArchNameForAssembler() { .Case("r600", "r600") .Case("ptx32", "ptx32") .Case("ptx64", "ptx64") + .Case("nvptx", "nvptx") + .Case("nvptx64", "nvptx64") .Case("le32", "le32") .Case("amdil", "amdil") .Default(NULL); @@ -251,6 +261,8 @@ static Triple::ArchType parseArch(StringRef ArchName) { .Case("xcore", Triple::xcore) .Case("ptx32", Triple::ptx32) .Case("ptx64", Triple::ptx64) + .Case("nvptx", Triple::nvptx) + .Case("nvptx64", Triple::nvptx64) .Case("le32", Triple::le32) .Case("amdil", Triple::amdil) .Default(Triple::UnknownArch); @@ -652,6 +664,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::mblaze: case llvm::Triple::mips: case llvm::Triple::mipsel: + case llvm::Triple::nvptx: case llvm::Triple::ppc: case llvm::Triple::ptx32: case llvm::Triple::r600: @@ -664,6 +677,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::mips64: case llvm::Triple::mips64el: + case llvm::Triple::nvptx64: case llvm::Triple::ppc64: case llvm::Triple::ptx64: case llvm::Triple::sparcv9: @@ -701,6 +715,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::mblaze: case Triple::mips: case Triple::mipsel: + case Triple::nvptx: case Triple::ppc: case Triple::ptx32: case Triple::r600: @@ -714,6 +729,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::mips64: T.setArch(Triple::mips); break; case Triple::mips64el: T.setArch(Triple::mipsel); break; + case Triple::nvptx64: T.setArch(Triple::nvptx); break; case Triple::ppc64: T.setArch(Triple::ppc); break; case Triple::ptx64: T.setArch(Triple::ptx32); break; case Triple::sparcv9: T.setArch(Triple::sparc); break; @@ -742,6 +758,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::mips64: case Triple::mips64el: + case Triple::nvptx64: case Triple::ppc64: case Triple::ptx64: case Triple::sparcv9: @@ -751,6 +768,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::mips: T.setArch(Triple::mips64); break; case Triple::mipsel: T.setArch(Triple::mips64el); break; + case Triple::nvptx: T.setArch(Triple::nvptx64); break; case Triple::ppc: T.setArch(Triple::ppc64); break; case Triple::ptx32: T.setArch(Triple::ptx64); break; case Triple::sparc: T.setArch(Triple::sparcv9); break; |