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authorDavid Goodwin <david_goodwin@apple.com>2009-07-23 17:06:46 +0000
committerDavid Goodwin <david_goodwin@apple.com>2009-07-23 17:06:46 +0000
commitb53cc014d0f47b898c9daca34566c16dda6c4c1e (patch)
treeef76f8a93008a2a0a10870625f92dd7528a084ad /lib/Target/ARM/ARMBaseRegisterInfo.h
parent0dcde10f5eac406c3897b4ca9d944f1ebd7aaf49 (diff)
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Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76883 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMBaseRegisterInfo.h')
-rw-r--r--lib/Target/ARM/ARMBaseRegisterInfo.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.h b/lib/Target/ARM/ARMBaseRegisterInfo.h
index 9165bbc..ac5e6b6 100644
--- a/lib/Target/ARM/ARMBaseRegisterInfo.h
+++ b/lib/Target/ARM/ARMBaseRegisterInfo.h
@@ -59,6 +59,13 @@ protected:
// Return the opcode that implements 'Op', or 0 if no opcode
unsigned getOpcode(int Op) const;
+ // If 'opcode' is an instruction with an unsigned offset that also
+ // has a version with a signed offset, return the opcode for the
+ // version with the signed offset. In 'NumBits' return the number of
+ // bits for the signed offset.
+ unsigned unsignedOffsetOpcodeToSigned(unsigned opcode,
+ unsigned *NumBits) const;
+
public:
/// getRegisterNumbering - Given the enum value for some register, e.g.
/// ARM::LR, return the number that it corresponds to (e.g. 14). It