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authorChris Lattner <sabre@nondot.org>2010-09-06 22:11:18 +0000
committerChris Lattner <sabre@nondot.org>2010-09-06 22:11:18 +0000
commitce4a3355d96971e7edcbff3c1975f83e1ddcb8f2 (patch)
treed960b4febe27f29c805fd3df6f13b2a0cc0534f8 /lib/Target/ARM/AsmParser
parenta008e8ac73cb3cf2eaf006fbb1b62905c8626758 (diff)
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in the case where an instruction only has one implementation
of a mneumonic, report operand errors with better location info. For example, we now report: t.s:6:14: error: invalid operand for instruction cwtl $1 ^ but we fail for common cases like: t.s:11:4: error: invalid operand for instruction addl $1, $1 ^ because we don't know if this is supposed to be the reg/imm or imm/reg form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser')
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 8507070..f2099d2 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -83,7 +83,8 @@ private:
bool MatchInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCInst &Inst) {
- if (MatchInstructionImpl(Operands, Inst) == Match_Success)
+ unsigned ErrorInfo;
+ if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success)
return false;
// FIXME: We should give nicer diagnostics about the exact failure.