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| author | Dan Gohman <gohman@apple.com> | 2010-05-06 20:33:48 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-05-06 20:33:48 +0000 |
| commit | 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 (patch) | |
| tree | 7fe414b47ddf800a4b132ac4b3cfe9d3da7ab8e9 /lib/Target/Alpha | |
| parent | 746ad69e088176819981b4b2c5ac8dcd49f5e60e (diff) | |
| download | external_llvm-34dcc6fadca0a1117cdbd0e9b35c991a55b6e556.zip external_llvm-34dcc6fadca0a1117cdbd0e9b35c991a55b6e556.tar.gz external_llvm-34dcc6fadca0a1117cdbd0e9b35c991a55b6e556.tar.bz2 | |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha')
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 12 | ||||
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.h | 3 |
2 files changed, 8 insertions, 7 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index a4df40c..3aba363 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -146,16 +146,14 @@ bool AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const { + const TargetRegisterClass *SrcRC, + DebugLoc DL) const { //cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n"; if (DestRC != SrcRC) { // Not yet supported! return false; } - DebugLoc DL; - if (MI != MBB.end()) DL = MI->getDebugLoc(); - if (DestRC == Alpha::GPRCRegisterClass) { BuildMI(MBB, MI, DL, get(Alpha::BISr), DestReg) .addReg(SrcReg) @@ -431,7 +429,8 @@ unsigned AlphaInstrInfo::getGlobalBaseReg(MachineFunction *MF) const { GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, Alpha::R29, - &Alpha::GPRCRegClass, &Alpha::GPRCRegClass); + &Alpha::GPRCRegClass, &Alpha::GPRCRegClass, + DebugLoc()); assert(Ok && "Couldn't assign to global base register!"); Ok = Ok; // Silence warning when assertions are turned off. RegInfo.addLiveIn(Alpha::R29); @@ -458,7 +457,8 @@ unsigned AlphaInstrInfo::getGlobalRetAddr(MachineFunction *MF) const { GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalRetAddr, Alpha::R26, - &Alpha::GPRCRegClass, &Alpha::GPRCRegClass); + &Alpha::GPRCRegClass, &Alpha::GPRCRegClass, + DebugLoc()); assert(Ok && "Couldn't assign to global return address register!"); Ok = Ok; // Silence warning when assertions are turned off. RegInfo.addLiveIn(Alpha::R26); diff --git a/lib/Target/Alpha/AlphaInstrInfo.h b/lib/Target/Alpha/AlphaInstrInfo.h index 1b4b4cf..7d7365b 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.h +++ b/lib/Target/Alpha/AlphaInstrInfo.h @@ -48,7 +48,8 @@ public: MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const; + const TargetRegisterClass *SrcRC, + DebugLoc DL) const; virtual void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, |