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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 01:50:59 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 01:50:59 +0000 |
commit | 7509ec18d100206cd44790641e012aae35714212 (patch) | |
tree | e76794c0cc63adc1b317febbee91bc29782a1d7b /lib/Target/Mips/MipsDSPInstrInfo.td | |
parent | 44aebe85e30e3ecb3d9fef39fe719513743e6024 (diff) | |
download | external_llvm-7509ec18d100206cd44790641e012aae35714212.zip external_llvm-7509ec18d100206cd44790641e012aae35714212.tar.gz external_llvm-7509ec18d100206cd44790641e012aae35714212.tar.bz2 |
MIPS DSP: add vector load/store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsDSPInstrInfo.td')
-rw-r--r-- | lib/Target/Mips/MipsDSPInstrInfo.td | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsDSPInstrInfo.td b/lib/Target/Mips/MipsDSPInstrInfo.td index 1a4fd87..556cf6b 100644 --- a/lib/Target/Mips/MipsDSPInstrInfo.td +++ b/lib/Target/Mips/MipsDSPInstrInfo.td @@ -18,3 +18,16 @@ def immZExt4 : ImmLeaf<i32, [{return isUInt<4>(Imm);}]>; def immZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}]>; def immZExt10 : ImmLeaf<i32, [{return isUInt<10>(Imm);}]>; def immSExt6 : ImmLeaf<i32, [{return isInt<6>(Imm);}]>; + +// Patterns. +class DSPPat<dag pattern, dag result, Predicate pred = HasDSP> : + Pat<pattern, result>, Requires<[pred]>; + +def : DSPPat<(v2i16 (load addr:$a)), + (v2i16 (COPY_TO_REGCLASS (LW addr:$a), DSPRegs))>; +def : DSPPat<(v4i8 (load addr:$a)), + (v4i8 (COPY_TO_REGCLASS (LW addr:$a), DSPRegs))>; +def : DSPPat<(store (v2i16 DSPRegs:$val), addr:$a), + (SW (COPY_TO_REGCLASS DSPRegs:$val, CPURegs), addr:$a)>; +def : DSPPat<(store (v4i8 DSPRegs:$val), addr:$a), + (SW (COPY_TO_REGCLASS DSPRegs:$val, CPURegs), addr:$a)>; |