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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-26 00:28:19 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-26 00:28:19 +0000 |
| commit | 6a45d681e53a99b4c4f63e0b1664626a596a8151 (patch) | |
| tree | 93f2e7b40f4ff7487a536b62da8f6dd2e2531b87 /lib/Target/PowerPC/PPCHazardRecognizers.h | |
| parent | 6d37a29588e9a48d81480501f895ac627bf60201 (diff) | |
| download | external_llvm-6a45d681e53a99b4c4f63e0b1664626a596a8151.zip external_llvm-6a45d681e53a99b4c4f63e0b1664626a596a8151.tar.gz external_llvm-6a45d681e53a99b4c4f63e0b1664626a596a8151.tar.bz2 | |
Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCHazardRecognizers.h')
0 files changed, 0 insertions, 0 deletions