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author | Dale Johannesen <dalej@apple.com> | 2008-10-23 20:41:28 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2008-10-23 20:41:28 +0000 |
commit | 639076fb84ab02e75d39415bd426a6a576ddef62 (patch) | |
tree | f6f37f45bd8247c42fd362b2ef143d3cc0315536 /lib/Target/PowerPC/PPCInstr64Bit.td | |
parent | e2e9d8e6aa914b81d79ff496736165f3358c6f3a (diff) | |
download | external_llvm-639076fb84ab02e75d39415bd426a6a576ddef62.zip external_llvm-639076fb84ab02e75d39415bd426a6a576ddef62.tar.gz external_llvm-639076fb84ab02e75d39415bd426a6a576ddef62.tar.bz2 |
Mark defs and uses of CTR and LR correctly.
Prevents DeadMachineInstructionElim from thinking
things like MTCTR are dead (fixes massive
testsuite breakage at -O0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58043 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstr64Bit.td')
-rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index acd5909..8376947 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -76,10 +76,12 @@ let isCall = 1, PPC970_Unit = 7, def BLA8_Macho : IForm<18, 1, 1, (outs), (ins aaddr:$func, variable_ops), "bla $func", BrB, [(PPCcall_Macho (i64 imm:$func))]>; - def BCTRL8_Macho : XLForm_2_ext<19, 528, 20, 0, 1, + let Uses = [CTR8] in { + def BCTRL8_Macho : XLForm_2_ext<19, 528, 20, 0, 1, (outs), (ins variable_ops), "bctrl", BrB, [(PPCbctrl_Macho)]>, Requires<[In64BitMode]>; + } } // ELF 64 ABI Calls = Macho ABI Calls @@ -98,10 +100,12 @@ let isCall = 1, PPC970_Unit = 7, def BLA8_ELF : IForm<18, 1, 1, (outs), (ins aaddr:$func, variable_ops), "bla $func", BrB, [(PPCcall_ELF (i64 imm:$func))]>; - def BCTRL8_ELF : XLForm_2_ext<19, 528, 20, 0, 1, + let Uses = [CTR8] in { + def BCTRL8_ELF : XLForm_2_ext<19, 528, 20, 0, 1, (outs), (ins variable_ops), "bctrl", BrB, [(PPCbctrl_ELF)]>, Requires<[In64BitMode]>; + } } @@ -186,7 +190,7 @@ def TCRETURNri8 : Pseudo<(outs), (ins CTRRC8:$dst, i32imm:$offset, variable_ops) let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, - isIndirectBranch = 1, isCall = 1, isReturn = 1 in + isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR] in def TAILBCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>, Requires<[In64BitMode]>; @@ -218,10 +222,12 @@ def : Pat<(PPCtc_return CTRRC8:$dst, imm:$imm), //===----------------------------------------------------------------------===// // 64-bit SPR manipulation instrs. +let Uses = [CTR8] in { def MFCTR8 : XFXForm_1_ext<31, 339, 9, (outs G8RC:$rT), (ins), "mfctr $rT", SprMFSPR>, PPC970_DGroup_First, PPC970_Unit_FXU; -let Pattern = [(PPCmtctr G8RC:$rS)] in { +} +let Pattern = [(PPCmtctr G8RC:$rS)], Defs = [CTR8] in { def MTCTR8 : XFXForm_7_ext<31, 467, 9, (outs), (ins G8RC:$rS), "mtctr $rS", SprMTSPR>, PPC970_DGroup_First, PPC970_Unit_FXU; @@ -233,13 +239,16 @@ def DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi), [(set G8RC:$result, (PPCdynalloc G8RC:$negsize, iaddr:$fpsi))]>; +let Defs = [LR8] in { def MTLR8 : XFXForm_7_ext<31, 467, 8, (outs), (ins G8RC:$rS), "mtlr $rS", SprMTSPR>, PPC970_DGroup_First, PPC970_Unit_FXU; +} +let Uses = [LR8] in { def MFLR8 : XFXForm_1_ext<31, 339, 8, (outs G8RC:$rT), (ins), "mflr $rT", SprMFSPR>, PPC970_DGroup_First, PPC970_Unit_FXU; - +} //===----------------------------------------------------------------------===// // Fixed point instructions. |