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author | Nicolas Geoffray <nicolas.geoffray@lip6.fr> | 2008-04-16 20:10:13 +0000 |
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committer | Nicolas Geoffray <nicolas.geoffray@lip6.fr> | 2008-04-16 20:10:13 +0000 |
commit | 52e724ad7e679ee590f4bd763d55280586a8f1bc (patch) | |
tree | 17e026641b730ae73981f77df025c5543c674201 /lib/Target/PowerPC | |
parent | dc00858e11d243bd2c7cb39bbb92c557b123573e (diff) | |
download | external_llvm-52e724ad7e679ee590f4bd763d55280586a8f1bc.zip external_llvm-52e724ad7e679ee590f4bd763d55280586a8f1bc.tar.gz external_llvm-52e724ad7e679ee590f4bd763d55280586a8f1bc.tar.bz2 |
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
-rw-r--r-- | lib/Target/PowerPC/PPCBranchSelector.cpp | 24 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 19 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.h | 5 |
3 files changed, 26 insertions, 22 deletions
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp index 6977093..ab988ba 100644 --- a/lib/Target/PowerPC/PPCBranchSelector.cpp +++ b/lib/Target/PowerPC/PPCBranchSelector.cpp @@ -22,7 +22,6 @@ #include "PPCPredicates.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetAsmInfo.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/MathExtras.h" @@ -54,25 +53,6 @@ FunctionPass *llvm::createPPCBranchSelectionPass() { return new PPCBSel(); } -/// getNumBytesForInstruction - Return the number of bytes of code the specified -/// instruction may be. This returns the maximum number of bytes. -/// -static unsigned getNumBytesForInstruction(MachineInstr *MI) { - switch (MI->getOpcode()) { - case PPC::INLINEASM: { // Inline Asm: Variable size. - MachineFunction *MF = MI->getParent()->getParent(); - const char *AsmStr = MI->getOperand(0).getSymbolName(); - return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr); - } - case PPC::LABEL: { - return 0; - } - default: - return 4; // PowerPC instructions are all 4 bytes - } -} - - bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) { const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo(); // Give the blocks of the function a dense, in-order, numbering. @@ -88,7 +68,7 @@ bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) { unsigned BlockSize = 0; for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end(); MBBI != EE; ++MBBI) - BlockSize += getNumBytesForInstruction(MBBI); + BlockSize += TII->GetInstSizeInBytes(MBBI); BlockSizes[MBB->getNumber()] = BlockSize; FuncSize += BlockSize; @@ -124,7 +104,7 @@ bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) { for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I) { if (I->getOpcode() != PPC::BCC || I->getOperand(2).isImmediate()) { - MBBStartOffset += getNumBytesForInstruction(I); + MBBStartOffset += TII->GetInstSizeInBytes(I); continue; } diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index ff7d42e..27ff767 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -20,6 +20,7 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Target/TargetAsmInfo.h" using namespace llvm; extern cl::opt<bool> EnablePPC32RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. @@ -724,3 +725,21 @@ ReverseBranchCondition(std::vector<MachineOperand> &Cond) const { Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); return false; } + +/// GetInstSize - Return the number of bytes of code the specified +/// instruction may be. This returns the maximum number of bytes. +/// +unsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { + switch (MI->getOpcode()) { + case PPC::INLINEASM: { // Inline Asm: Variable size. + const MachineFunction *MF = MI->getParent()->getParent(); + const char *AsmStr = MI->getOperand(0).getSymbolName(); + return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr); + } + case PPC::LABEL: { + return 0; + } + default: + return 4; // PowerPC instructions are all 4 bytes + } +} diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h index d74399d..5bd4c4d 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.h +++ b/lib/Target/PowerPC/PPCInstrInfo.h @@ -155,6 +155,11 @@ public: virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const; virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; + + /// GetInstSize - Return the number of bytes of code the specified + /// instruction may be. This returns the maximum number of bytes. + /// + virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const; }; } |