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author | Chris Lattner <sabre@nondot.org> | 2010-07-08 23:46:44 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-07-08 23:46:44 +0000 |
commit | eed3f01d1560592c7e0f7545a8c128bfe39e879d (patch) | |
tree | 4706d1f82d62567d32ad048a7d6e50a08c56f40e /lib/Target/X86/AsmPrinter/X86MCInstLower.cpp | |
parent | fed1703144c218146aa0c1aab7c7b8a844b332ed (diff) | |
download | external_llvm-eed3f01d1560592c7e0f7545a8c128bfe39e879d.zip external_llvm-eed3f01d1560592c7e0f7545a8c128bfe39e879d.tar.gz external_llvm-eed3f01d1560592c7e0f7545a8c128bfe39e879d.tar.bz2 |
Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/AsmPrinter/X86MCInstLower.cpp')
-rw-r--r-- | lib/Target/X86/AsmPrinter/X86MCInstLower.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp index 717614f..a394747 100644 --- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp +++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp @@ -349,6 +349,15 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { switch (OutMI.getOpcode()) { case X86::LEA64_32r: // Handle 'subreg rewriting' for the lea64_32mem operand. lower_lea64_32mem(&OutMI, 1); + // FALL THROUGH. + case X86::LEA64r: + case X86::LEA16r: + case X86::LEA32r: + // LEA should have a segment register, but it must be empty. + assert(OutMI.getNumOperands() == 1+X86::AddrNumOperands && + "Unexpected # of LEA operands"); + assert(OutMI.getOperand(1+X86::AddrSegmentReg).getReg() == 0 && + "LEA has segment specified!"); break; case X86::MOVZX16rr8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr8); break; case X86::MOVZX16rm8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm8); break; |