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authorEvan Cheng <evan.cheng@apple.com>2006-01-27 08:10:46 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-01-27 08:10:46 +0000
commit559806f575297866609c7bef0e5c1084dcdda9a5 (patch)
treed061be377c273c9dae3cc9330effd387aedb0a02 /lib/Target/X86/X86.td
parent19c95507443ebd4f1cee80917d540c8bd27f8fe1 (diff)
downloadexternal_llvm-559806f575297866609c7bef0e5c1084dcdda9a5.zip
external_llvm-559806f575297866609c7bef0e5c1084dcdda9a5.tar.gz
external_llvm-559806f575297866609c7bef0e5c1084dcdda9a5.tar.bz2
x86 CPU detection and proper subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r--lib/Target/X86/X86.td50
1 files changed, 26 insertions, 24 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index f341949..6b7b131 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -20,19 +20,19 @@ include "../Target.td"
// X86 Subtarget features.
//
-def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit",
- "Enable 64-bit instructions">;
-def FeatureMMX : SubtargetFeature<"mmx", "bool", "HasMMX",
+def Feature64Bit : SubtargetFeature<"64bit", "Is64Bit", "true",
+ "Enabl e 64-bit instructions">;
+def FeatureMMX : SubtargetFeature<"mmx","X86SSELevel", "MMX",
"Enable MMX instructions">;
-def FeatureSSE : SubtargetFeature<"sse", "bool", "HasSSE",
+def FeatureSSE : SubtargetFeature<"sse", "X86SSELevel", "SSE",
"Enable SSE instructions">;
-def FeatureSSE2 : SubtargetFeature<"sse2", "bool", "HasSSE2",
+def FeatureSSE2 : SubtargetFeature<"sse2", "X86SSELevel", "SSE2",
"Enable SSE2 instructions">;
-def FeatureSSE3 : SubtargetFeature<"sse3", "bool", "HasSSE3",
+def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3",
"Enable SSE3 instructions">;
-def Feature3DNow : SubtargetFeature<"3dnow", "bool", "Has3DNow",
+def Feature3DNow : SubtargetFeature<"3dnow", "X863DNowLevel", "ThreeDNow",
"Enable 3DNow! instructions">;
-def Feature3DNowA : SubtargetFeature<"3dnowa", "bool", "Has3DNowA",
+def Feature3DNowA : SubtargetFeature<"3dnowa", "X863DNowLevel", "ThreeDNowA",
"Enable 3DNow! Athlon instructions">;
//===----------------------------------------------------------------------===//
@@ -45,21 +45,20 @@ class Proc<string Name, list<SubtargetFeature> Features>
def : Proc<"generic", []>;
def : Proc<"i386", []>;
def : Proc<"i486", []>;
-def : Proc<"i586", []>;
def : Proc<"pentium", []>;
def : Proc<"pentium-mmx", [FeatureMMX]>;
def : Proc<"i686", []>;
def : Proc<"pentiumpro", []>;
def : Proc<"pentium2", [FeatureMMX]>;
-def : Proc<"celeron", [FeatureMMX]>;
def : Proc<"pentium3", [FeatureMMX, FeatureSSE]>;
-def : Proc<"pentium3m", [FeatureMMX, FeatureSSE]>;
def : Proc<"pentium-m", [FeatureMMX, FeatureSSE, FeatureSSE2]>;
def : Proc<"pentium4", [FeatureMMX, FeatureSSE, FeatureSSE2]>;
-def : Proc<"pentium4m", [FeatureMMX, FeatureSSE, FeatureSSE2]>;
+def : Proc<"x86-64", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ Feature64Bit]>;
+def : Proc<"yonah", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ FeatureSSE3]>;
def : Proc<"prescott", [FeatureMMX, FeatureSSE, FeatureSSE2,
FeatureSSE3]>;
-def : Proc<"x86-64", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature64Bit]>;
def : Proc<"nocona", [FeatureMMX, FeatureSSE, FeatureSSE2,
FeatureSSE3, Feature64Bit]>;
@@ -68,17 +67,20 @@ def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>;
def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>;
def : Proc<"athlon", [FeatureMMX, Feature3DNow, Feature3DNowA]>;
def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNow, Feature3DNowA]>;
-def : Proc<"athlon-4", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>;
-def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>;
-def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE, Feature3DNow, Feature3DNowA]>;
-def : Proc<"k8", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow,
- Feature3DNowA, Feature64Bit]>;
-def : Proc<"opteron", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow,
- Feature3DNowA, Feature64Bit]>;
-def : Proc<"athlon64", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow,
- Feature3DNowA, Feature64Bit]>;
-def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE, FeatureSSE2, Feature3DNow,
- Feature3DNowA, Feature64Bit]>;
+def : Proc<"athlon-4", [FeatureMMX, FeatureSSE, Feature3DNow,
+ Feature3DNowA]>;
+def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE, Feature3DNow,
+ Feature3DNowA]>;
+def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE, Feature3DNow,
+ Feature3DNowA]>;
+def : Proc<"k8", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ Feature3DNow, Feature3DNowA, Feature64Bit]>;
+def : Proc<"opteron", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ Feature3DNow, Feature3DNowA, Feature64Bit]>;
+def : Proc<"athlon64", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ Feature3DNow, Feature3DNowA, Feature64Bit]>;
+def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ Feature3DNow, Feature3DNowA, Feature64Bit]>;
def : Proc<"winchip-c6", [FeatureMMX]>;
def : Proc<"winchip2", [FeatureMMX, Feature3DNow]>;