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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-09-07 20:20:27 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-09-07 20:20:27 +0000 |
| commit | 0d1340b181cd1defddfe7afb51a17124ad61ea1e (patch) | |
| tree | 45b09c154637a5a7f8e3a8f1924959cdb8d2580a /lib/Target/X86/X86ISelLowering.cpp | |
| parent | c88c11d607c5e3154dad679b11ad5326d1f0e8ac (diff) | |
| download | external_llvm-0d1340b181cd1defddfe7afb51a17124ad61ea1e.zip external_llvm-0d1340b181cd1defddfe7afb51a17124ad61ea1e.tar.gz external_llvm-0d1340b181cd1defddfe7afb51a17124ad61ea1e.tar.bz2 | |
Move code around to prepare for moving some of the logic together to another function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113267 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index aef02a8..9d507d3 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5271,9 +5271,6 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const { MachineFunction &MF = DAG.getMachineFunction(); bool OptForSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); - if (isZeroShuffle(SVOp)) - return getZeroVector(VT, Subtarget->hasSSE2(), DAG, dl); - // FIXME: this is somehow handled during isel by MMX pattern fragments. Remove // the check or come up with another solution when all MMX move to intrinsics, // but don't allow this to be considered legal, we don't want vector_shuffle @@ -5281,6 +5278,9 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const { if (isMMX && SVOp->isSplat()) return Op; + if (isZeroShuffle(SVOp)) + return getZeroVector(VT, Subtarget->hasSSE2(), DAG, dl); + // Promote splats to v4f32. if (SVOp->isSplat()) return PromoteSplat(SVOp, DAG); |