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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-09-04 02:58:56 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-09-04 02:58:56 +0000
commit2eb63dfa0a618fe58b9335ceb4e2b67ab5c9f679 (patch)
tree4325c528a20a2cc08bc9a4e35aceb6c01474f85d /lib/Target/X86/X86ISelLowering.cpp
parent828f6ae03c214609fec1fce8cd32f4fcf2645f57 (diff)
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Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding mmx shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113059 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp8
1 files changed, 3 insertions, 5 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 147f201..974d9eb 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5472,14 +5472,12 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
X86::getShufflePALIGNRImmediate(SVOp),
DAG);
- // MMX shuffles not already handled must be expanded.
+ // Only a few shuffle masks are handled for 64-bit vectors (MMX), and
+ // 64-bit vectors which made to this point can't be handled, they are
+ // expanded.
if (VT.getSizeInBits() == 64)
return SDValue();
- // FIXME: pshufb, blends, shifts.
- if (VT.getVectorNumElements() == 2)
- return Op;
-
if (ShuffleVectorSDNode::isSplatMask(&M[0], VT) &&
SVOp->getSplatIndex() == 0 && V2IsUndef) {
if (VT == MVT::v2f64)