- Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a

  shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 34 insertions, 4 deletions

diff --git a/lib/Target/X86/README-SSE.txt b/lib/Target/X86/README-SSE.txt
index ad28248..8714424 100644
--- a/lib/Target/X86/README-SSE.txt
+++ b/lib/Target/X86/README-SSE.txt
@@ -808,3 +808,34 @@ LC0:
 With SSE4, it should be
       movdqa  .LC0(%rip), %xmm0
       pinsrb  $6, %edi, %xmm0
+
+//===---------------------------------------------------------------------===//
+
+We should transform a shuffle of two vectors of constants into a single vector
+of constants. Also, insertelement of a constant into a vector of constants
+should also result in a vector of constants. e.g. 2008-06-25-VecISelBug.ll.
+
+We compiled it to something horrible:
+
+	.align	4
+LCPI1_1:					##  float
+	.long	1065353216	## float 1
+	.const
+
+	.align	4
+LCPI1_0:					##  <4 x float>
+	.space	4
+	.long	1065353216	## float 1
+	.space	4
+	.long	1065353216	## float 1
+	.text
+	.align	4,0x90
+	.globl	_t
+_t:
+	xorps	%xmm0, %xmm0
+	movhps	LCPI1_0, %xmm0
+	movss	LCPI1_1, %xmm1
+	movaps	%xmm0, %xmm2
+	shufps	$2, %xmm1, %xmm2
+	shufps	$132, %xmm2, %xmm0
+	movaps	%xmm0, 0
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 1671442..bc7a4ae 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -2933,12 +2933,12 @@ unsigned getNumOfConsecutiveZeros(SDOperand Op, SDOperand Mask,
                                   SelectionDAG &DAG) {
   unsigned NumZeros = 0;
   for (unsigned i = 0; i < NumElems; ++i) {
-    SDOperand Idx = Mask.getOperand(Low ? i : NumElems-i-1);
+    unsigned Index = Low ? i : NumElems-i-1;
+    SDOperand Idx = Mask.getOperand(Index);
     if (Idx.getOpcode() == ISD::UNDEF) {
       ++NumZeros;
       continue;
     }
-    unsigned Index = cast<ConstantSDNode>(Idx)->getValue();
     SDOperand Elt = DAG.getShuffleScalarElt(Op.Val, Index);
     if (Elt.Val && isZeroNode(Elt))
       ++NumZeros;
@@ -6373,8 +6373,7 @@ static bool EltsFromConsecutiveLoads(SDNode *N, SDOperand PermMask,
       continue;
     }
 
-    unsigned Index = cast<ConstantSDNode>(Idx)->getValue();
-    SDOperand Elt = DAG.getShuffleScalarElt(N, Index);
+    SDOperand Elt = DAG.getShuffleScalarElt(N, i);
     if (!Elt.Val ||
         (Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.Val)))
       return false;