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authorChris Lattner <sabre@nondot.org>2005-09-14 21:10:24 +0000
committerChris Lattner <sabre@nondot.org>2005-09-14 21:10:24 +0000
commit43ef1318c61222ab9fd571255d9163c9249bd323 (patch)
tree00d623089e36088e44d09fd8ec69509346d3c787 /lib/Target
parent5d7d3dba9cf4477ad96b21bd0fa7c7d6b27155cd (diff)
downloadexternal_llvm-43ef1318c61222ab9fd571255d9163c9249bd323.zip
external_llvm-43ef1318c61222ab9fd571255d9163c9249bd323.tar.gz
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give all operands names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.td7
-rw-r--r--lib/Target/X86/X86InstrInfo.td19
2 files changed, 14 insertions, 12 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index f80a31f..d762acd 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -275,8 +275,8 @@ def crbitm: Operand<i8> {
def PHI : Pseudo<(ops variable_ops), "; PHI">;
let isLoad = 1 in {
-def ADJCALLSTACKDOWN : Pseudo<(ops u16imm), "; ADJCALLSTACKDOWN">;
-def ADJCALLSTACKUP : Pseudo<(ops u16imm), "; ADJCALLSTACKUP">;
+def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKDOWN">;
+def ADJCALLSTACKUP : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKUP">;
}
def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC">;
def IMPLICIT_DEF_FP : Pseudo<(ops FPRC:$rD), "; %rD = IMPLICIT_DEF_FP">;
@@ -301,7 +301,8 @@ let Defs = [LR] in
def MovePCtoLR : Pseudo<(ops piclabel:$label), "bl $label">;
let isBranch = 1, isTerminator = 1 in {
- def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm, target:$true, target:$false),
+ def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm:$opc,
+ target:$true, target:$false),
"; COND_BRANCH">;
def B : IForm<18, 0, 0, (ops target:$func), "b $func">;
//def BA : IForm<18, 1, 0, (ops target:$func), "ba $func">;
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 2ab048f..7d89ae0 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -145,8 +145,9 @@ class Ii32<bits<8> o, Format f, dag ops, string asm>
def PHI : I<0, Pseudo, (ops variable_ops), "PHINODE">; // PHI node.
def NOOP : I<0x90, RawFrm, (ops), "nop">; // nop
-def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm), "#ADJCALLSTACKDOWN">;
-def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm, i32imm), "#ADJCALLSTACKUP">;
+def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN">;
+def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2),
+ "#ADJCALLSTACKUP">;
def IMPLICIT_USE : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_USE">;
def IMPLICIT_DEF : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_DEF">;
let isTerminator = 1 in
@@ -1563,20 +1564,20 @@ class FPI<bits<8> o, Format F, FPFormat fp, dag ops, string asm>
// forms of instructions for doing these operations. Until the stackifier runs,
// we prefer to be abstract.
def FpMOV : FPI<0, Pseudo, SpecialFP,
- (ops RFP, RFP), "">; // f1 = fmov f2
+ (ops RFP:$dst, RFP:$src), "">; // f1 = fmov f2
def FpADD : FPI<0, Pseudo, TwoArgFP ,
- (ops RFP, RFP, RFP), "">; // f1 = fadd f2, f3
+ (ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fadd f2, f3
def FpSUB : FPI<0, Pseudo, TwoArgFP ,
- (ops RFP, RFP, RFP), "">; // f1 = fsub f2, f3
+ (ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fsub f2, f3
def FpMUL : FPI<0, Pseudo, TwoArgFP ,
- (ops RFP, RFP, RFP), "">; // f1 = fmul f2, f3
+ (ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fmul f2, f3
def FpDIV : FPI<0, Pseudo, TwoArgFP ,
- (ops RFP, RFP, RFP), "">; // f1 = fdiv f2, f3
+ (ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fdiv f2, f3
-def FpGETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP), "">,
+def FpGETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP:$dst), "">,
Imp<[ST0], []>; // FPR = ST(0)
-def FpSETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP), "">,
+def FpSETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP:$src), "">,
Imp<[], [ST0]>; // ST(0) = FPR
// FADD reg, mem: Before stackification, these are represented by: