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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-05-03 13:04:41 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-05-03 13:04:41 +0000 |
| commit | 6ee626a1c16dfac052c1506b7a24051b6bc96beb (patch) | |
| tree | 1f960fe6e5f2816d3c9238f8c7a1f39d17440705 /lib/Target | |
| parent | c8166ac76097ff245a484008137237ac88a05e71 (diff) | |
| download | external_llvm-6ee626a1c16dfac052c1506b7a24051b6bc96beb.zip external_llvm-6ee626a1c16dfac052c1506b7a24051b6bc96beb.tar.gz external_llvm-6ee626a1c16dfac052c1506b7a24051b6bc96beb.tar.bz2 | |
Add reg-imm variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/MSP430/MSP430InstrInfo.td | 37 |
1 files changed, 35 insertions, 2 deletions
diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td index aead48b..6eed56d 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.td +++ b/lib/Target/MSP430/MSP430InstrInfo.td @@ -77,13 +77,26 @@ def ADD16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2), "add.w\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (add GR16:$src1, GR16:$src2)), (implicit SR)]>; +} + +def ADD16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), + "add.w\t{$src2, $dst|$dst, $src2}", + [(set GR16:$dst, (add GR16:$src1, imm:$src2)), + (implicit SR)]>; let Uses = [SR] in { + +let isCommutable = 1 in { // X = ADDC Y, Z == X = ADDC Z, Y def ADC16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2), "addc.w\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (adde GR16:$src1, GR16:$src2)), (implicit SR)]>; -} +} // isCommutable + +def ADC16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), + "addc.w\t{$src2, $dst|$dst, $src2}", + [(set GR16:$dst, (adde GR16:$src1, imm:$src2)), + (implicit SR)]>; } let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y @@ -93,24 +106,44 @@ def AND16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2), (implicit SR)]>; } -let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y +def AND16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), + "and.w\t{$src2, $dst|$dst, $src2}", + [(set GR16:$dst, (and GR16:$src1, imm:$src2)), + (implicit SR)]>; + +let isCommutable = 1 in { // X = XOR Y, Z == X = XOR Z, Y def XOR16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2), "xor.w\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (xor GR16:$src1, GR16:$src2)), (implicit SR)]>; } +def XOR16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), + "xor.w\t{$src2, $dst|$dst, $src2}", + [(set GR16:$dst, (xor GR16:$src1, imm:$src2)), + (implicit SR)]>; + def SUB16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2), "sub.w\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sub GR16:$src1, GR16:$src2)), (implicit SR)]>; +def SUB16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), + "sub.w\t{$src2, $dst|$dst, $src2}", + [(set GR16:$dst, (sub GR16:$src1, imm:$src2)), + (implicit SR)]>; + let Uses = [SR] in { def SBC16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2), "subc.w\t{$src2, $dst|$dst, $src2}", [(set GR16:$dst, (sube GR16:$src1, GR16:$src2)), (implicit SR)]>; + +def SBC16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2), + "subc.w\t{$src2, $dst|$dst, $src2}", + [(set GR16:$dst, (sube GR16:$src1, imm:$src2)), + (implicit SR)]>; } // FIXME: Provide proper encoding! |