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author | Dan Gohman <gohman@apple.com> | 2009-01-05 17:59:02 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-01-05 17:59:02 +0000 |
commit | d68a07650cdb2e18f18f362ba533459aa10e01b6 (patch) | |
tree | 0b0b5b402393260240d66dd4889d094b41a2ee82 /lib/Target | |
parent | 08f053f5d1df120dc8389a3ec8947ab16b1ccc53 (diff) | |
download | external_llvm-d68a07650cdb2e18f18f362ba533459aa10e01b6.zip external_llvm-d68a07650cdb2e18f18f362ba533459aa10e01b6.tar.gz external_llvm-d68a07650cdb2e18f18f362ba533459aa10e01b6.tar.bz2 |
Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/ARM.h | 1 | ||||
-rw-r--r-- | lib/Target/ARM/ARMConstantPoolValue.h | 2 | ||||
-rw-r--r-- | lib/Target/Alpha/Alpha.h | 2 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 1 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPU.h | 1 | ||||
-rw-r--r-- | lib/Target/IA64/IA64.h | 2 | ||||
-rw-r--r-- | lib/Target/IA64/IA64InstrInfo.cpp | 1 | ||||
-rw-r--r-- | lib/Target/MSIL/MSILWriter.h | 1 | ||||
-rw-r--r-- | lib/Target/Mips/Mips.h | 2 | ||||
-rw-r--r-- | lib/Target/Mips/MipsMachineFunction.h | 1 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16.h | 2 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPC.h | 3 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCSubtarget.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Sparc/Sparc.h | 1 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.cpp | 1 | ||||
-rw-r--r-- | lib/Target/X86/X86.h | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 9 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.h | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86Subtarget.h | 1 |
20 files changed, 13 insertions, 27 deletions
diff --git a/lib/Target/ARM/ARM.h b/lib/Target/ARM/ARM.h index 4b26b24..0358230 100644 --- a/lib/Target/ARM/ARM.h +++ b/lib/Target/ARM/ARM.h @@ -15,7 +15,6 @@ #ifndef TARGET_ARM_H #define TARGET_ARM_H -#include <iosfwd> #include <cassert> namespace llvm { diff --git a/lib/Target/ARM/ARMConstantPoolValue.h b/lib/Target/ARM/ARMConstantPoolValue.h index 7b10565..d2b9066 100644 --- a/lib/Target/ARM/ARMConstantPoolValue.h +++ b/lib/Target/ARM/ARMConstantPoolValue.h @@ -15,7 +15,7 @@ #define LLVM_TARGET_ARM_CONSTANTPOOLVALUE_H #include "llvm/CodeGen/MachineConstantPool.h" -#include <ostream> +#include <iosfwd> namespace llvm { diff --git a/lib/Target/Alpha/Alpha.h b/lib/Target/Alpha/Alpha.h index f62270d..9af46d0 100644 --- a/lib/Target/Alpha/Alpha.h +++ b/lib/Target/Alpha/Alpha.h @@ -15,8 +15,6 @@ #ifndef TARGET_ALPHA_H #define TARGET_ALPHA_H -#include <iosfwd> - namespace llvm { class AlphaTargetMachine; diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index bd6f2cf..fa8224f 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -15,6 +15,7 @@ #include "AlphaInstrInfo.h" #include "AlphaGenInstrInfo.inc" #include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineInstrBuilder.h" using namespace llvm; diff --git a/lib/Target/CellSPU/SPU.h b/lib/Target/CellSPU/SPU.h index 776b9bf..a6a9110 100644 --- a/lib/Target/CellSPU/SPU.h +++ b/lib/Target/CellSPU/SPU.h @@ -16,7 +16,6 @@ #define LLVM_TARGET_IBMCELLSPU_H #include "llvm/Support/DataTypes.h" -#include <iosfwd> namespace llvm { class SPUTargetMachine; diff --git a/lib/Target/IA64/IA64.h b/lib/Target/IA64/IA64.h index 1fe1488..030a233 100644 --- a/lib/Target/IA64/IA64.h +++ b/lib/Target/IA64/IA64.h @@ -14,8 +14,6 @@ #ifndef TARGET_IA64_H #define TARGET_IA64_H -#include <iosfwd> - namespace llvm { class IA64TargetMachine; diff --git a/lib/Target/IA64/IA64InstrInfo.cpp b/lib/Target/IA64/IA64InstrInfo.cpp index a9dce85..0a13c68 100644 --- a/lib/Target/IA64/IA64InstrInfo.cpp +++ b/lib/Target/IA64/IA64InstrInfo.cpp @@ -15,6 +15,7 @@ #include "IA64.h" #include "IA64InstrBuilder.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/ADT/SmallVector.h" #include "IA64GenInstrInfo.inc" using namespace llvm; diff --git a/lib/Target/MSIL/MSILWriter.h b/lib/Target/MSIL/MSILWriter.h index c64ceee..45f5579 100644 --- a/lib/Target/MSIL/MSILWriter.h +++ b/lib/Target/MSIL/MSILWriter.h @@ -27,7 +27,6 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Support/Mangler.h" -#include <algorithm> #include <ios> using namespace llvm; diff --git a/lib/Target/Mips/Mips.h b/lib/Target/Mips/Mips.h index 1dc53ca..03f5a52 100644 --- a/lib/Target/Mips/Mips.h +++ b/lib/Target/Mips/Mips.h @@ -15,8 +15,6 @@ #ifndef TARGET_MIPS_H #define TARGET_MIPS_H -#include <iosfwd> - namespace llvm { class MipsTargetMachine; class FunctionPass; diff --git a/lib/Target/Mips/MipsMachineFunction.h b/lib/Target/Mips/MipsMachineFunction.h index fd5658c..b95394e 100644 --- a/lib/Target/Mips/MipsMachineFunction.h +++ b/lib/Target/Mips/MipsMachineFunction.h @@ -14,6 +14,7 @@ #ifndef MIPS_MACHINE_FUNCTION_INFO_H #define MIPS_MACHINE_FUNCTION_INFO_H +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/VectorExtras.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" diff --git a/lib/Target/PIC16/PIC16.h b/lib/Target/PIC16/PIC16.h index f35acd5..6850bd6 100644 --- a/lib/Target/PIC16/PIC16.h +++ b/lib/Target/PIC16/PIC16.h @@ -15,8 +15,6 @@ #ifndef LLVM_TARGET_PIC16_H #define LLVM_TARGET_PIC16_H -#include <iosfwd> - namespace llvm { class PIC16TargetMachine; class FunctionPass; diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h index 9a8e22e..773b9c1 100644 --- a/lib/Target/PowerPC/PPC.h +++ b/lib/Target/PowerPC/PPC.h @@ -15,9 +15,6 @@ #ifndef LLVM_TARGET_POWERPC_H #define LLVM_TARGET_POWERPC_H -#include <iosfwd> - - // GCC #defines PPC on Linux but we use it as our namespace name #undef PPC diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp index e63368b..425d8e6 100644 --- a/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/lib/Target/PowerPC/PPCSubtarget.cpp @@ -16,6 +16,7 @@ #include "llvm/Module.h" #include "llvm/Target/TargetMachine.h" #include "PPCGenSubtarget.inc" +#include <cstdlib> using namespace llvm; #if defined(__APPLE__) diff --git a/lib/Target/Sparc/Sparc.h b/lib/Target/Sparc/Sparc.h index 1096144..baac8f0 100644 --- a/lib/Target/Sparc/Sparc.h +++ b/lib/Target/Sparc/Sparc.h @@ -15,7 +15,6 @@ #ifndef TARGET_SPARC_H #define TARGET_SPARC_H -#include <iosfwd> #include <cassert> namespace llvm { diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp index 8b07bcb..8601cbe 100644 --- a/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/lib/Target/Sparc/SparcInstrInfo.cpp @@ -15,6 +15,7 @@ #include "SparcSubtarget.h" #include "Sparc.h" #include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "SparcGenInstrInfo.inc" using namespace llvm; diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index 0c2d3b3..135787b 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -15,8 +15,6 @@ #ifndef TARGET_X86_H #define TARGET_X86_H -#include <iosfwd> - namespace llvm { class X86TargetMachine; diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index cb12a9d..9170c24 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -18,6 +18,7 @@ #include "X86MachineFunctionInfo.h" #include "X86Subtarget.h" #include "X86TargetMachine.h" +#include "llvm/DerivedTypes.h" #include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -1913,7 +1914,7 @@ bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, } static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode, - const SmallVector<MachineOperand,4> &MOs, + const SmallVectorImpl<MachineOperand> &MOs, MachineInstr *MI, const TargetInstrInfo &TII) { // Create the base instruction with the memory operand as the first part. MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true); @@ -1939,7 +1940,7 @@ static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode, static MachineInstr *FuseInst(MachineFunction &MF, unsigned Opcode, unsigned OpNo, - const SmallVector<MachineOperand,4> &MOs, + const SmallVectorImpl<MachineOperand> &MOs, MachineInstr *MI, const TargetInstrInfo &TII) { MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true); MachineInstrBuilder MIB(NewMI); @@ -1961,7 +1962,7 @@ static MachineInstr *FuseInst(MachineFunction &MF, } static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode, - const SmallVector<MachineOperand,4> &MOs, + const SmallVectorImpl<MachineOperand> &MOs, MachineInstr *MI) { MachineFunction &MF = *MI->getParent()->getParent(); MachineInstrBuilder MIB = BuildMI(MF, TII.get(Opcode)); @@ -1977,7 +1978,7 @@ static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode, MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, unsigned i, - const SmallVector<MachineOperand,4> &MOs) const{ + const SmallVectorImpl<MachineOperand> &MOs) const{ const DenseMap<unsigned*, unsigned> *OpcodeTablePtr = NULL; bool isTwoAddrFold = false; unsigned NumOps = MI->getDesc().getNumOperands(); diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 21c9a1f..a75c5e6 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -17,7 +17,7 @@ #include "llvm/Target/TargetInstrInfo.h" #include "X86.h" #include "X86RegisterInfo.h" -#include "llvm/ADT/IndexedMap.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/Target/TargetRegisterInfo.h" namespace llvm { @@ -447,7 +447,7 @@ private: MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI, unsigned OpNum, - const SmallVector<MachineOperand,4> &MOs) const; + const SmallVectorImpl<MachineOperand> &MOs) const; }; } // End llvm namespace diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h index 25d7b07..b51a533 100644 --- a/lib/Target/X86/X86RegisterInfo.h +++ b/lib/Target/X86/X86RegisterInfo.h @@ -14,8 +14,6 @@ #ifndef X86REGISTERINFO_H #define X86REGISTERINFO_H -#include "llvm/ADT/DenseMap.h" -#include "llvm/ADT/SmallVector.h" #include "llvm/Target/TargetRegisterInfo.h" #include "X86GenRegisterInfo.h.inc" diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index 646a953..ded26e8 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -15,7 +15,6 @@ #define X86SUBTARGET_H #include "llvm/Target/TargetSubtarget.h" - #include <string> namespace llvm { |