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author | Gabor Greif <ggreif@gmail.com> | 2010-04-16 01:16:20 +0000 |
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committer | Gabor Greif <ggreif@gmail.com> | 2010-04-16 01:16:20 +0000 |
commit | 607a7ab3da72a2eb53553a520507cbb8068dd1d8 (patch) | |
tree | a24f057eee6bdd4edd74d509424b13bed1dda2de /lib/Transforms/InstCombine/InstCombineCompares.cpp | |
parent | 5f0378251c4b682b51d194fce45da1587ed9c97b (diff) | |
download | external_llvm-607a7ab3da72a2eb53553a520507cbb8068dd1d8.zip external_llvm-607a7ab3da72a2eb53553a520507cbb8068dd1d8.tar.gz external_llvm-607a7ab3da72a2eb53553a520507cbb8068dd1d8.tar.bz2 |
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101434 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/InstCombine/InstCombineCompares.cpp')
-rw-r--r-- | lib/Transforms/InstCombine/InstCombineCompares.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineCompares.cpp b/lib/Transforms/InstCombine/InstCombineCompares.cpp index 1812e1d..861cf92 100644 --- a/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ b/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -1423,7 +1423,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI, switch (II->getIntrinsicID()) { case Intrinsic::bswap: Worklist.Add(II); - ICI.setOperand(0, II->getOperand(0)); + ICI.setOperand(0, II->getOperand(1)); ICI.setOperand(1, ConstantInt::get(II->getContext(), RHSV.byteSwap())); return &ICI; case Intrinsic::ctlz: @@ -1431,7 +1431,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI, // ctz(A) == bitwidth(a) -> A == 0 and likewise for != if (RHSV == RHS->getType()->getBitWidth()) { Worklist.Add(II); - ICI.setOperand(0, II->getOperand(0)); + ICI.setOperand(0, II->getOperand(1)); ICI.setOperand(1, ConstantInt::get(RHS->getType(), 0)); return &ICI; } @@ -1440,7 +1440,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI, // popcount(A) == 0 -> A == 0 and likewise for != if (RHS->isZero()) { Worklist.Add(II); - ICI.setOperand(0, II->getOperand(0)); + ICI.setOperand(0, II->getOperand(1)); ICI.setOperand(1, RHS); return &ICI; } |