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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-08-17 18:17:12 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-08-17 18:17:12 +0000 |
commit | 4bb862d179486008406ec5025f925bac5493ad0d (patch) | |
tree | 007419bd6c6b1dfb075fb5eba8cc056b8224b749 /lib | |
parent | 8708ead5a46f4ec8f2d5f832be23381924d72b8d (diff) | |
download | external_llvm-4bb862d179486008406ec5025f925bac5493ad0d.zip external_llvm-4bb862d179486008406ec5025f925bac5493ad0d.tar.gz external_llvm-4bb862d179486008406ec5025f925bac5493ad0d.tar.bz2 |
Don't call Predicate_* methods directly from Sparc target.
Modernize predicates a bit.
The Predicate_* methods are not used by TableGen any longer. They are only
emitted for the sake of legacy code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111263 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/Sparc/SparcISelDAGToDAG.cpp | 8 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 12 |
2 files changed, 6 insertions, 14 deletions
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp index 698923e..4ea94c4 100644 --- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -84,7 +84,7 @@ bool SparcDAGToDAGISel::SelectADDRri(SDNode *Op, SDValue Addr, if (Addr.getOpcode() == ISD::ADD) { if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) { - if (Predicate_simm13(CN)) { + if (isInt<13>(CN->getSExtValue())) { if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) { // Constant offset from frame ref. @@ -120,9 +120,9 @@ bool SparcDAGToDAGISel::SelectADDRrr(SDNode *Op, SDValue Addr, return false; // direct calls. if (Addr.getOpcode() == ISD::ADD) { - if (isa<ConstantSDNode>(Addr.getOperand(1)) && - Predicate_simm13(Addr.getOperand(1).getNode())) - return false; // Let the reg+imm pattern catch this! + if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) + if (isInt<13>(CN->getSExtValue())) + return false; // Let the reg+imm pattern catch this! if (Addr.getOperand(0).getOpcode() == SPISD::Lo || Addr.getOperand(1).getOpcode() == SPISD::Lo) return false; // Let the reg+imm pattern catch this! diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index ddadd51..467ed48 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -43,17 +43,9 @@ def UseDeprecatedInsts : Predicate<"Subtarget.useDeprecatedV8Instructions()">; // Instruction Pattern Stuff //===----------------------------------------------------------------------===// -def simm11 : PatLeaf<(imm), [{ - // simm11 predicate - True if the imm fits in a 11-bit sign extended field. - return (((int)N->getZExtValue() << (32-11)) >> (32-11)) == - (int)N->getZExtValue(); -}]>; +def simm11 : PatLeaf<(imm), [{ return isInt<11>(N->getSExtValue()); }]>; -def simm13 : PatLeaf<(imm), [{ - // simm13 predicate - True if the imm fits in a 13-bit sign extended field. - return (((int)N->getZExtValue() << (32-13)) >> (32-13)) == - (int)N->getZExtValue(); -}]>; +def simm13 : PatLeaf<(imm), [{ return isInt<13>(N->getSExtValue()); }]>; def LO10 : SDNodeXForm<imm, [{ return CurDAG->getTargetConstant((unsigned)N->getZExtValue() & 1023, |