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| author | Evan Cheng <evan.cheng@apple.com> | 2009-07-02 23:16:11 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-02 23:16:11 +0000 |
| commit | 4fbb9960adcd79888acda1869d26032b9ab44a10 (patch) | |
| tree | 4c833c3315d8859b261c22dd800ac3c25b7a8acf /lib | |
| parent | eeb4a84ac8d91fb1d5a7c484a1c7047409faee30 (diff) | |
| download | external_llvm-4fbb9960adcd79888acda1869d26032b9ab44a10.zip external_llvm-4fbb9960adcd79888acda1869d26032b9ab44a10.tar.gz external_llvm-4fbb9960adcd79888acda1869d26032b9ab44a10.tar.bz2 | |
Sign extending pre/post indexed loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 12 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 22 |
2 files changed, 32 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 4b73ba2..6485fc1 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -794,6 +794,7 @@ SDNode *ARMDAGToDAGISel::SelectT2IndexedLoad(SDValue Op) { return NULL; MVT LoadedVT = LD->getMemoryVT(); + bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; SDValue Offset; bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); unsigned Opcode = 0; @@ -804,10 +805,17 @@ SDNode *ARMDAGToDAGISel::SelectT2IndexedLoad(SDValue Op) { Opcode = isPre ? ARM::t2LDR_PRE : ARM::t2LDR_POST; break; case MVT::i16: - Opcode = isPre ? ARM::t2LDRH_PRE : ARM::t2LDRH_POST; + if (isSExtLd) + Opcode = isPre ? ARM::t2LDRSH_PRE : ARM::t2LDRSH_POST; + else + Opcode = isPre ? ARM::t2LDRH_PRE : ARM::t2LDRH_POST; break; case MVT::i8: - Opcode = isPre ? ARM::t2LDRB_PRE : ARM::t2LDRB_POST; + case MVT::i1: + if (isSExtLd) + Opcode = isPre ? ARM::t2LDRSB_PRE : ARM::t2LDRSB_POST; + else + Opcode = isPre ? ARM::t2LDRB_PRE : ARM::t2LDRB_POST; break; default: return NULL; diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 127b274..e418a4f 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -579,6 +579,28 @@ def t2LDRH_POST : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb), "ldrh", " $dst, [$base], $offset", "$base = $base_wb", []>; +def t2LDRSB_PRE : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb), + (ins t2addrmode_imm8:$addr), + AddrModeT2_i8, IndexModePre, + "ldrsb", " $dst, $addr!", "$addr.base = $base_wb", + []>; +def t2LDRSB_POST : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb), + (ins GPR:$base, t2am_imm8_offset:$offset), + AddrModeT2_i8, IndexModePost, + "ldrsb", " $dst, [$base], $offset", "$base = $base_wb", + []>; + +def t2LDRSH_PRE : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb), + (ins t2addrmode_imm8:$addr), + AddrModeT2_i8, IndexModePre, + "ldrsh", " $dst, $addr!", "$addr.base = $base_wb", + []>; +def t2LDRSH_POST : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb), + (ins GPR:$base, t2am_imm8_offset:$offset), + AddrModeT2_i8, IndexModePost, + "ldrsh", " $dst, [$base], $offset", "$base = $base_wb", + []>; + // Store defm t2STR : T2I_st<"str", BinOpFrag<(store node:$LHS, node:$RHS)>>; defm t2STRB : T2I_st<"strb", BinOpFrag<(truncstorei8 node:$LHS, node:$RHS)>>; |