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author | Evan Cheng <evan.cheng@apple.com> | 2007-09-19 01:38:40 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-09-19 01:38:40 +0000 |
commit | 713a98dee8ab07a3066d1707a07648d27dd0c19c (patch) | |
tree | 54c0efe9349233ea62e126f50444d2eddbdddb95 /lib | |
parent | dcfa73fe3cf9b67573b188424477bc22ed900adf (diff) | |
download | external_llvm-713a98dee8ab07a3066d1707a07648d27dd0c19c.zip external_llvm-713a98dee8ab07a3066d1707a07648d27dd0c19c.tar.gz external_llvm-713a98dee8ab07a3066d1707a07648d27dd0c19c.tar.bz2 |
Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42125 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 12 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp | 14 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 44 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp | 2 |
4 files changed, 36 insertions, 36 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 070fdbd..1346595 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -193,7 +193,7 @@ void ScheduleDAG::CalculateDepths() { SU->Depth = Depth; for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) - WorkList.push_back(std::make_pair(I->first, Depth+1)); + WorkList.push_back(std::make_pair(I->Dep, Depth+1)); } } } @@ -211,7 +211,7 @@ void ScheduleDAG::CalculateHeights() { SU->Height = Height; for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) - WorkList.push_back(std::make_pair(I->first, Height+1)); + WorkList.push_back(std::make_pair(I->Dep, Height+1)); } } } @@ -865,22 +865,22 @@ void SUnit::dumpAll(const SelectionDAG *G) const { cerr << " Predecessors:\n"; for (SUnit::const_succ_iterator I = Preds.begin(), E = Preds.end(); I != E; ++I) { - if (I->second) + if (I->isCtrl) cerr << " ch #"; else cerr << " val #"; - cerr << I->first << " - SU(" << I->first->NodeNum << ")\n"; + cerr << I->Dep << " - SU(" << I->Dep->NodeNum << ")\n"; } } if (Succs.size() != 0) { cerr << " Successors:\n"; for (SUnit::const_succ_iterator I = Succs.begin(), E = Succs.end(); I != E; ++I) { - if (I->second) + if (I->isCtrl) cerr << " ch #"; else cerr << " val #"; - cerr << I->first << " - SU(" << I->first->NodeNum << ")\n"; + cerr << I->Dep << " - SU(" << I->Dep->NodeNum << ")\n"; } } cerr << "\n"; diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp index 9e4e46f..7b09749 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp @@ -134,9 +134,9 @@ void ScheduleDAGList::ReleaseSucc(SUnit *SuccSU, bool isChain) { // If this is a token edge, we don't need to wait for the latency of the // preceeding instruction (e.g. a long-latency load) unless there is also // some other data dependence. - SUnit &Pred = *I->first; + SUnit &Pred = *I->Dep; unsigned PredDoneCycle = Pred.Cycle; - if (!I->second) + if (!I->isCtrl) PredDoneCycle += Pred.Latency; else if (Pred.Latency) PredDoneCycle += 1; @@ -161,7 +161,7 @@ void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { // Bottom up: release successors. for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) - ReleaseSucc(I->first, I->second); + ReleaseSucc(I->Dep, I->isCtrl); } /// ListScheduleTopDown - The main loop of list scheduling for top-down @@ -436,7 +436,7 @@ int LatencyPriorityQueue::CalcLatency(const SUnit &SU) { int MaxSuccLatency = 0; for (SUnit::const_succ_iterator I = SU.Succs.begin(), E = SU.Succs.end(); I != E; ++I) - MaxSuccLatency = std::max(MaxSuccLatency, CalcLatency(*I->first)); + MaxSuccLatency = std::max(MaxSuccLatency, CalcLatency(*I->Dep)); return Latency = MaxSuccLatency + SU.Latency; } @@ -456,7 +456,7 @@ SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { SUnit *OnlyAvailablePred = 0; for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { - SUnit &Pred = *I->first; + SUnit &Pred = *I->Dep; if (!Pred.isScheduled) { // We found an available, but not scheduled, predecessor. If it's the // only one we have found, keep track of it... otherwise give up. @@ -475,7 +475,7 @@ void LatencyPriorityQueue::push_impl(SUnit *SU) { unsigned NumNodesBlocking = 0; for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) - if (getSingleUnscheduledPred(I->first) == SU) + if (getSingleUnscheduledPred(I->Dep) == SU) ++NumNodesBlocking; NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking; @@ -490,7 +490,7 @@ void LatencyPriorityQueue::push_impl(SUnit *SU) { void LatencyPriorityQueue::ScheduledNode(SUnit *SU) { for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) - AdjustPriorityOfUnscheduledPreds(I->first); + AdjustPriorityOfUnscheduledPreds(I->Dep); } /// AdjustPriorityOfUnscheduledPreds - One of the predecessors of SU was just diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 8c8648d..ea23c27 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -157,8 +157,8 @@ void ScheduleDAGRRList::CommuteNodesToReducePressure() { for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { - if (!I->second) - OperandSeen.insert(I->first); + if (!I->isCtrl) + OperandSeen.insert(I->Dep); } } } @@ -214,7 +214,7 @@ void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) { // Bottom up: release predecessors for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) - ReleasePred(I->first, I->second, CurCycle); + ReleasePred(I->Dep, I->isCtrl, CurCycle); SU->isScheduled = true; } @@ -325,7 +325,7 @@ void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { // Top down: release successors for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) - ReleaseSucc(I->first, I->second, CurCycle); + ReleaseSucc(I->Dep, I->isCtrl, CurCycle); SU->isScheduled = true; } @@ -584,11 +584,11 @@ static unsigned closestSucc(const SUnit *SU) { unsigned MaxCycle = 0; for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) { - unsigned Cycle = I->first->Cycle; + unsigned Cycle = I->Dep->Cycle; // If there are bunch of CopyToRegs stacked up, they should be considered // to be at the same position. - if (I->first->Node->getOpcode() == ISD::CopyToReg) - Cycle = closestSucc(I->first)+1; + if (I->Dep->Node->getOpcode() == ISD::CopyToReg) + Cycle = closestSucc(I->Dep)+1; if (Cycle > MaxCycle) MaxCycle = Cycle; } @@ -602,14 +602,14 @@ static unsigned calcMaxScratches(const SUnit *SU) { unsigned Scratches = 0; for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { - if (I->second) continue; // ignore chain preds - if (I->first->Node->getOpcode() != ISD::CopyFromReg) + if (I->isCtrl) continue; // ignore chain preds + if (I->Dep->Node->getOpcode() != ISD::CopyFromReg) Scratches++; } for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) { - if (I->second) continue; // ignore chain succs - if (I->first->Node->getOpcode() != ISD::CopyToReg) + if (I->isCtrl) continue; // ignore chain succs + if (I->Dep->Node->getOpcode() != ISD::CopyToReg) Scratches += 10; } return Scratches; @@ -691,7 +691,7 @@ static void isReachable(SUnit *SU, SUnit *TargetSU, for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) - isReachable(I->first, TargetSU, Visited, Reached); + isReachable(I->Dep, TargetSU, Visited, Reached); } static bool isReachable(SUnit *SU, SUnit *TargetSU) { @@ -744,8 +744,8 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() { if (!DUSU) continue; for (SUnit::succ_iterator I = DUSU->Succs.begin(),E = DUSU->Succs.end(); I != E; ++I) { - if (I->second) continue; - SUnit *SuccSU = I->first; + if (I->isCtrl) continue; + SUnit *SuccSU = I->Dep; if (SuccSU != SU && (!canClobber(SuccSU, DUSU) || (!SU->isCommutable && SuccSU->isCommutable))){ @@ -776,13 +776,13 @@ CalcNodeSethiUllmanNumber(const SUnit *SU) { unsigned Extra = 0; for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { - if (I->second) continue; // ignore chain preds - SUnit *PredSU = I->first; + if (I->isCtrl) continue; // ignore chain preds + SUnit *PredSU = I->Dep; unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU); if (PredSethiUllman > SethiUllmanNumber) { SethiUllmanNumber = PredSethiUllman; Extra = 0; - } else if (PredSethiUllman == SethiUllmanNumber && !I->second) + } else if (PredSethiUllman == SethiUllmanNumber && !I->isCtrl) Extra++; } @@ -808,10 +808,10 @@ static unsigned SumOfUnscheduledPredsOfSuccs(const SUnit *SU) { unsigned Sum = 0; for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) { - SUnit *SuccSU = I->first; + SUnit *SuccSU = I->Dep; for (SUnit::const_pred_iterator II = SuccSU->Preds.begin(), EE = SuccSU->Preds.end(); II != EE; ++II) { - SUnit *PredSU = II->first; + SUnit *PredSU = II->Dep; if (!PredSU->isScheduled) Sum++; } @@ -899,13 +899,13 @@ CalcNodeSethiUllmanNumber(const SUnit *SU) { int Extra = 0; for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { - if (I->second) continue; // ignore chain preds - SUnit *PredSU = I->first; + if (I->isCtrl) continue; // ignore chain preds + SUnit *PredSU = I->Dep; unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU); if (PredSethiUllman > SethiUllmanNumber) { SethiUllmanNumber = PredSethiUllman; Extra = 0; - } else if (PredSethiUllman == SethiUllmanNumber && !I->second) + } else if (PredSethiUllman == SethiUllmanNumber && !I->isCtrl) Extra++; } diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp index d03439b..73902b8 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp @@ -264,7 +264,7 @@ namespace llvm { /// edge, override this method. template<typename EdgeIter> static std::string getEdgeAttributes(const void *Node, EdgeIter EI) { - if (EI.isChain()) + if (EI.isCtrlDep()) return "color=blue,style=dashed"; return ""; } |