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author | Tim Northover <Tim.Northover@arm.com> | 2013-02-06 16:43:33 +0000 |
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committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-06 16:43:33 +0000 |
commit | 8a06229c89f848bf742e2b88423d02558b7ca638 (patch) | |
tree | 199f15ef02b0e4e5077718feae6f418159dd965a /lib | |
parent | 2e402d5b5f2fce8bfe29509cc771b9919946003b (diff) | |
download | external_llvm-8a06229c89f848bf742e2b88423d02558b7ca638.zip external_llvm-8a06229c89f848bf742e2b88423d02558b7ca638.tar.gz external_llvm-8a06229c89f848bf742e2b88423d02558b7ca638.tar.bz2 |
Implement external weak (ELF) symbols on AArch64
Weakly defined symbols should evaluate to 0 if they're undefined at
link-time. This is impossible to do with the usual address generation
patterns, so we should use a literal pool entry to materlialise the
address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174518 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/AArch64/AArch64ISelLowering.cpp | 15 | ||||
-rw-r--r-- | lib/Target/AArch64/AArch64InstrInfo.td | 6 |
2 files changed, 17 insertions, 4 deletions
diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index e2e472f..071b432 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1863,7 +1863,7 @@ AArch64TargetLowering::LowerGlobalAddressELF(SDValue Op, // TableGen doesn't have easy access to the CodeModel or RelocationModel, so // we make that distinction here. - // We support the static, small memory model for now. + // We support the small memory model for now. assert(getTargetMachine().getCodeModel() == CodeModel::Small); EVT PtrVT = getPointerTy(); @@ -1871,6 +1871,18 @@ AArch64TargetLowering::LowerGlobalAddressELF(SDValue Op, const GlobalAddressSDNode *GN = cast<GlobalAddressSDNode>(Op); const GlobalValue *GV = GN->getGlobal(); unsigned Alignment = GV->getAlignment(); + Reloc::Model RelocM = getTargetMachine().getRelocationModel(); + + if (GV->isWeakForLinker() && RelocM == Reloc::Static) { + // Weak symbols can't use ADRP/ADD pair since they should evaluate to + // zero when undefined. In PIC mode the GOT can take care of this, but in + // absolute mode we use a constant pool load. + return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), + DAG.getConstantPool(GV, GN->getValueType(0)), + MachinePointerInfo::getConstantPool(), + /*isVolatile=*/ false, /*isNonTemporal=*/ true, + /*isInvariant=*/ true, 8); + } if (Alignment == 0) { const PointerType *GVPtrTy = cast<PointerType>(GV->getType()); @@ -1886,7 +1898,6 @@ AArch64TargetLowering::LowerGlobalAddressELF(SDValue Op, } unsigned char HiFixup, LoFixup; - Reloc::Model RelocM = getTargetMachine().getRelocationModel(); bool UseGOT = Subtarget->GVIsIndirectSymbol(GV, RelocM); if (UseGOT) { diff --git a/lib/Target/AArch64/AArch64InstrInfo.td b/lib/Target/AArch64/AArch64InstrInfo.td index 538d4bd..a9ff02a 100644 --- a/lib/Target/AArch64/AArch64InstrInfo.td +++ b/lib/Target/AArch64/AArch64InstrInfo.td @@ -2409,8 +2409,10 @@ class A64I_LDRlitSimple<bits<2> opc, bit v, RegisterClass OutReg, "ldr\t$Rt, $Imm19", patterns, NoItinerary>; let mayLoad = 1 in { - def LDRw_lit : A64I_LDRlitSimple<0b00, 0b0, GPR32>; - def LDRx_lit : A64I_LDRlitSimple<0b01, 0b0, GPR64>; + def LDRw_lit : A64I_LDRlitSimple<0b00, 0b0, GPR32, + [(set (i32 GPR32:$Rt), (load constpool:$Imm19))]>; + def LDRx_lit : A64I_LDRlitSimple<0b01, 0b0, GPR64, + [(set (i64 GPR64:$Rt), (load constpool:$Imm19))]>; } def LDRs_lit : A64I_LDRlitSimple<0b00, 0b1, FPR32, |