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| author | Shih-wei Liao <sliao@google.com> | 2010-08-09 23:25:51 -0700 |
|---|---|---|
| committer | Shih-wei Liao <sliao@google.com> | 2010-08-09 23:25:51 -0700 |
| commit | 97bca3642164e5e7b735914fb5bfeb5a163c0885 (patch) | |
| tree | 58335c78870750be1553c61132ab048dc92a4406 /lib | |
| parent | 7f80b0a9af7a6618516fb29324c83b26189a7372 (diff) | |
| download | external_llvm-97bca3642164e5e7b735914fb5bfeb5a163c0885.zip external_llvm-97bca3642164e5e7b735914fb5bfeb5a163c0885.tar.gz external_llvm-97bca3642164e5e7b735914fb5bfeb5a163c0885.tar.bz2 | |
Make emitConstPoolAddress use reloc_arm_so_imm...
Change-Id: I4856d1e8b958156624b4b72aec8466342ce05f5d
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 9bc0706..277f058 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -596,8 +596,8 @@ void ARMCodeEmitter::emitLEApcrelInstruction(const MachineInstr &MI) { unsigned Binary = 0x4 << 21; // add: Insts{24-31} = 0b0100 // For VFP load, the immediate offset is multiplied by 4. - unsigned Reloc = ((TID.TSFlags & ARMII::FormMask) == ARMII::VFPLdStFrm) - ? ARM::reloc_arm_vfp_cp_entry : ARM::reloc_arm_cp_entry; + // unsigned Reloc = ((TID.TSFlags & ARMII::FormMask) == ARMII::VFPLdStFrm) + // ? ARM::reloc_arm_vfp_cp_entry : ARM::reloc_arm_cp_entry; // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; @@ -611,9 +611,9 @@ void ARMCodeEmitter::emitLEApcrelInstruction(const MachineInstr &MI) { // Encode Rn which is PC. Binary |= ARMRegisterInfo::getRegisterNumbering(ARM::PC) << ARMII::RegRnShift; - // Encode the displacement. + // Encode the displacement which is a so_imm Binary |= 1 << ARMII::I_BitShift; - emitConstPoolAddress(MI.getOperand(1).getIndex(), Reloc); + emitConstPoolAddress(MI.getOperand(1).getIndex(), ARM::reloc_arm_so_imm); emitWordLE(Binary); } |