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| author | Chad Rosier <mcrosier@apple.com> | 2012-11-27 01:10:48 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-11-27 01:10:48 +0000 |
| commit | 277068fe405baa018abe010e64ed1806a6b4ba0d (patch) | |
| tree | 332d7577ebd2139e31119d55c023b7b3ccf38ef2 /test/CodeGen/ARM/fast-isel-icmp.ll | |
| parent | fc17ddd889e3dcb608e8e97c4c791755c21d7b14 (diff) | |
| download | external_llvm-277068fe405baa018abe010e64ed1806a6b4ba0d.zip external_llvm-277068fe405baa018abe010e64ed1806a6b4ba0d.tar.gz external_llvm-277068fe405baa018abe010e64ed1806a6b4ba0d.tar.bz2 | |
Extend test case for r168657.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168658 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-icmp.ll')
| -rw-r--r-- | test/CodeGen/ARM/fast-isel-icmp.ll | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/fast-isel-icmp.ll b/test/CodeGen/ARM/fast-isel-icmp.ll index 8764bef..8357ed5 100644 --- a/test/CodeGen/ARM/fast-isel-icmp.ll +++ b/test/CodeGen/ARM/fast-isel-icmp.ll @@ -1,6 +1,21 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB +define i32 @icmp_i16_signed(i16 %a, i16 %b) nounwind { +entry: +; ARM: icmp_i16_signed +; ARM: sxth r0, r0 +; ARM: sxth r1, r1 +; ARM: cmp r0, r1 +; THUMB: icmp_i16_signed +; THUMB: sxth r0, r0 +; THUMB: sxth r1, r1 +; THUMB: cmp r0, r1 + %cmp = icmp slt i16 %a, %b + %conv2 = zext i1 %cmp to i32 + ret i32 %conv2 +} + define i32 @icmp_i16_unsigned(i16 %a, i16 %b) nounwind { entry: ; ARM: icmp_i16_unsigned @@ -31,6 +46,21 @@ entry: ret i32 %conv2 } +define i32 @icmp_i8_unsigned(i8 %a, i8 %b) nounwind { +entry: +; ARM: icmp_i8_unsigned +; ARM: uxtb r0, r0 +; ARM: uxtb r1, r1 +; ARM: cmp r0, r1 +; THUMB: icmp_i8_unsigned +; THUMB: uxtb r0, r0 +; THUMB: uxtb r1, r1 +; THUMB: cmp r0, r1 + %cmp = icmp ugt i8 %a, %b + %conv2 = zext i1 %cmp to i32 + ret i32 %conv2 +} + define i32 @icmp_i1_unsigned(i1 %a, i1 %b) nounwind { entry: ; ARM: icmp_i1_unsigned |