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authorScott Michel <scottm@aero.org>2008-01-11 21:01:19 +0000
committerScott Michel <scottm@aero.org>2008-01-11 21:01:19 +0000
commit497e888daf9ba6489928e1153804ed12a7fe44c5 (patch)
tree689b7eba823de615856afce10540803e5a9b3a5e /test/CodeGen/CellSPU
parentef68e75618bb0c1369076283a876853608cc1436 (diff)
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More CellSPU refinements:
- struct_2.ll: Completely unaligned load/store testing - call_indirect.ll, struct_1.ll: Add test lines to exercise X-form [$reg($reg)] addressing At this point, loads and stores should be under control (he says in an optimistic tone of voice.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/CellSPU')
-rw-r--r--test/CodeGen/CellSPU/call_indirect.ll11
-rw-r--r--test/CodeGen/CellSPU/struct_1.ll33
-rw-r--r--test/CodeGen/CellSPU/struct_2.ll122
3 files changed, 163 insertions, 3 deletions
diff --git a/test/CodeGen/CellSPU/call_indirect.ll b/test/CodeGen/CellSPU/call_indirect.ll
index 7aa8abc..27157ca 100644
--- a/test/CodeGen/CellSPU/call_indirect.ll
+++ b/test/CodeGen/CellSPU/call_indirect.ll
@@ -1,10 +1,21 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s
; RUN: grep bisl %t1.s | count 6 &&
; RUN: grep ila %t1.s | count 1 &&
; RUN: grep rotqbyi %t1.s | count 4 &&
; RUN: grep lqa %t1.s | count 4 &&
; RUN: grep lqd %t1.s | count 6 &&
; RUN: grep dispatch_tab %t1.s | count 10
+; RUN: grep bisl %t2.s | count 6 &&
+; RUN: grep ilhu %t2.s | count 1 &&
+; RUN: grep iohl %t2.s | count 1 &&
+; RUN: grep rotqby %t2.s | count 5 &&
+; RUN: grep lqd %t2.s | count 12 &&
+; RUN: grep lqx %t2.s | count 6 &&
+; RUN: grep il %t2.s | count 7 &&
+; RUN: grep ai %t2.s | count 5 &&
+; RUN: grep dispatch_tab %t2.s | count 7
+
; ModuleID = 'call_indirect.bc'
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
target triple = "spu-unknown-elf"
diff --git a/test/CodeGen/CellSPU/struct_1.ll b/test/CodeGen/CellSPU/struct_1.ll
index 1159b55..a28520c 100644
--- a/test/CodeGen/CellSPU/struct_1.ll
+++ b/test/CodeGen/CellSPU/struct_1.ll
@@ -1,14 +1,27 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s
; RUN: grep lqa %t1.s | count 10 &&
-; RUN: grep lqd %t1.s | count 2 &&
+; RUN: grep lqd %t1.s | count 4 &&
; RUN: grep rotqbyi %t1.s | count 5 &&
; RUN: grep xshw %t1.s | count 1 &&
; RUN: grep andi %t1.s | count 4 &&
; RUN: grep cbd %t1.s | count 3 &&
; RUN: grep chd %t1.s | count 1 &&
-; RUN: grep cwd %t1.s | count 1 &&
-; RUN: grep shufb %t1.s | count 5 &&
+; RUN: grep cwd %t1.s | count 3 &&
+; RUN: grep shufb %t1.s | count 7 &&
; RUN: grep stqa %t1.s | count 5
+; RUN: grep iohl %t2.s | count 14 &&
+; RUN: grep ilhu %t2.s | count 14 &&
+; RUN: grep lqx %t2.s | count 14 &&
+; RUN: grep rotqbyi %t2.s | count 5 &&
+; RUN: grep xshw %t2.s | count 1 &&
+; RUN: grep andi %t2.s | count 4 &&
+; RUN: grep cbd %t2.s | count 3 &&
+; RUN: grep chd %t2.s | count 1 &&
+; RUN: grep cwd %t2.s | count 3 &&
+; RUN: grep shufb %t2.s | count 7 &&
+; RUN: grep stqx %t2.s | count 7
+
; ModuleID = 'struct_1.bc'
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
@@ -105,3 +118,17 @@ entry:
store i16 %s, i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16
ret void
}
+
+define void @set_hackstate_i3(i32 %i) {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 11), align 16
+ ret void
+}
+
+
+define void @set_hackstate_i6(i32 %i) {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16
+ ret void
+}
+
diff --git a/test/CodeGen/CellSPU/struct_2.ll b/test/CodeGen/CellSPU/struct_2.ll
new file mode 100644
index 0000000..3c2484c
--- /dev/null
+++ b/test/CodeGen/CellSPU/struct_2.ll
@@ -0,0 +1,122 @@
+; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: grep lqx %t1.s | count 14 &&
+; RUN: grep rotqby %t1.s | count 7 &&
+; RUN: grep xshw %t1.s | count 1 &&
+; RUN: grep andi %t1.s | count 4 &&
+; RUN: grep cbx %t1.s | count 1 &&
+; RUN: grep cbd %t1.s | count 2 &&
+; RUN: grep chd %t1.s | count 1 &&
+; RUN: grep cwd %t1.s | count 3 &&
+; RUN: grep shufb %t1.s | count 7 &&
+; RUN: grep stqx %t1.s | count 7
+
+; ModuleID = 'struct_1.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; struct hackstate {
+; unsigned char c1; // offset 0 (rotate left by 13 bytes to byte 3)
+; unsigned char c2; // offset 1 (rotate left by 14 bytes to byte 3)
+; unsigned char c3; // offset 2 (rotate left by 15 bytes to byte 3)
+; int i1; // offset 4 (rotate left by 4 bytes to byte 0)
+; short s1; // offset 8 (rotate left by 6 bytes to byte 2)
+; int i2; // offset 12 [ignored]
+; unsigned char c4; // offset 16 [ignored]
+; unsigned char c5; // offset 17 [ignored]
+; unsigned char c6; // offset 18 [ignored]
+; unsigned char c7; // offset 19 (no rotate, in preferred slot)
+; int i3; // offset 20 [ignored]
+; int i4; // offset 24 [ignored]
+; int i5; // offset 28 [ignored]
+; int i6; // offset 32 (no rotate, in preferred slot)
+; }
+%struct.hackstate = type { i8, i8, i8, i32, i16, i32, i8, i8, i8, i8, i32, i32, i32, i32 }
+
+; struct hackstate state = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+@state = global %struct.hackstate zeroinitializer, align 4
+
+define i8 @get_hackstate_c1() zeroext {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 4
+ ret i8 %tmp2
+}
+
+define i8 @get_hackstate_c2() zeroext {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 4
+ ret i8 %tmp2
+}
+
+define i8 @get_hackstate_c3() zeroext {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 4
+ ret i8 %tmp2
+}
+
+define i32 @get_hackstate_i1() {
+entry:
+ %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 4
+ ret i32 %tmp2
+}
+
+define i16 @get_hackstate_s1() signext {
+entry:
+ %tmp2 = load i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 4
+ ret i16 %tmp2
+}
+
+define i8 @get_hackstate_c7() zeroext {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 9), align 4
+ ret i8 %tmp2
+}
+
+define i32 @get_hackstate_i6() zeroext {
+entry:
+ %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 4
+ ret i32 %tmp2
+}
+
+define void @set_hackstate_c1(i8 zeroext %c) {
+entry:
+ store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 4
+ ret void
+}
+
+define void @set_hackstate_c2(i8 zeroext %c) {
+entry:
+ store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 4
+ ret void
+}
+
+define void @set_hackstate_c3(i8 zeroext %c) {
+entry:
+ store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 4
+ ret void
+}
+
+define void @set_hackstate_i1(i32 %i) {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 4
+ ret void
+}
+
+define void @set_hackstate_s1(i16 signext %s) {
+entry:
+ store i16 %s, i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 4
+ ret void
+}
+
+define void @set_hackstate_i3(i32 %i) {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 11), align 4
+ ret void
+}
+
+
+define void @set_hackstate_i6(i32 %i) {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 4
+ ret void
+}
+