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| author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-09-02 10:05:01 +0000 |
|---|---|---|
| committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-09-02 10:05:01 +0000 |
| commit | 989621f1f8356c977d7578252422de1b65d24587 (patch) | |
| tree | 6928eb54de4e68d87b13148667176b7311ca3ffc /test/CodeGen/CellSPU | |
| parent | 5ffedb9352ad24f50fa647153dcf04af4e84dbb1 (diff) | |
| download | external_llvm-989621f1f8356c977d7578252422de1b65d24587.zip external_llvm-989621f1f8356c977d7578252422de1b65d24587.tar.gz external_llvm-989621f1f8356c977d7578252422de1b65d24587.tar.bz2 | |
Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/CellSPU')
| -rw-r--r-- | test/CodeGen/CellSPU/or_ops.ll | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/test/CodeGen/CellSPU/or_ops.ll b/test/CodeGen/CellSPU/or_ops.ll index 46349b9..4f1febb 100644 --- a/test/CodeGen/CellSPU/or_ops.ll +++ b/test/CodeGen/CellSPU/or_ops.ll @@ -1,9 +1,11 @@ ; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep and %t1.s | count 2 ; RUN: grep orc %t1.s | count 85 -; RUN: grep ori %t1.s | count 30 +; RUN: grep ori %t1.s | count 34 ; RUN: grep orhi %t1.s | count 30 ; RUN: grep orbi %t1.s | count 15 +; RUN: FileCheck %s < %t1.s + target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -210,6 +212,15 @@ define signext i32 @ori_i32(i32 signext %in) { ret i32 %tmp38 } +define i32 @ori_i32_600(i32 %in) { + ;600 does not fit into 'ori' immediate field + ;CHECK: ori_i32_600 + ;CHECK: il + ;CHECK: ori + %tmp = or i32 %in, 600 + ret i32 %tmp +} + ; ORHI instruction generation (i16 data type): define <8 x i16> @orhi_v8i16_1(<8 x i16> %in) { %tmp2 = or <8 x i16> %in, < i16 511, i16 511, i16 511, i16 511, |