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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-09-30 18:51:46 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-09-30 18:51:46 +0000 |
| commit | c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac (patch) | |
| tree | 94b2daab77201e44a69ed7032f419f772a28aa5b /test/CodeGen/Mips/mips64shift.ll | |
| parent | cbf676b3ba907f72405a02938f5cd85fb3e6a46c (diff) | |
| download | external_llvm-c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac.zip external_llvm-c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac.tar.gz external_llvm-c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac.tar.bz2 | |
Add definitions of Mips64 rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/mips64shift.ll')
| -rw-r--r-- | test/CodeGen/Mips/mips64shift.ll | 42 |
1 files changed, 41 insertions, 1 deletions
diff --git a/test/CodeGen/Mips/mips64shift.ll b/test/CodeGen/Mips/mips64shift.ll index 24decbb..cc5e508 100644 --- a/test/CodeGen/Mips/mips64shift.ll +++ b/test/CodeGen/Mips/mips64shift.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mips64el -mcpu=mips64r1 < %s | FileCheck %s +; RUN: llc -march=mips64el -mcpu=mips64r2 < %s | FileCheck %s define i64 @f0(i64 %a0, i64 %a1) nounwind readnone { entry: @@ -62,3 +62,43 @@ entry: %shr = lshr i64 %a0, 40 ret i64 %shr } + +define i64 @f9(i64 %a0, i64 %a1) nounwind readnone { +entry: +; CHECK: drotrv + %shr = lshr i64 %a0, %a1 + %sub = sub i64 64, %a1 + %shl = shl i64 %a0, %sub + %or = or i64 %shl, %shr + ret i64 %or +} + +define i64 @f10(i64 %a0, i64 %a1) nounwind readnone { +entry: +; CHECK: drotrv + %shl = shl i64 %a0, %a1 + %sub = sub i64 64, %a1 + %shr = lshr i64 %a0, %sub + %or = or i64 %shr, %shl + ret i64 %or +} + +define i64 @f11(i64 %a0) nounwind readnone { +entry: +; CHECK: drotr ${{[0-9]+}}, ${{[0-9]+}}, 10 + %shr = lshr i64 %a0, 10 + %shl = shl i64 %a0, 54 + %or = or i64 %shr, %shl + ret i64 %or +} + +define i64 @f12(i64 %a0) nounwind readnone { +entry: +; CHECK: drotr32 ${{[0-9]+}}, ${{[0-9]+}}, 22 + %shl = shl i64 %a0, 10 + %shr = lshr i64 %a0, 54 + %or = or i64 %shl, %shr + ret i64 %or +} + + |