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author | Akira Hatanaka <ahatanak@gmail.com> | 2011-03-31 18:26:17 +0000 |
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committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-03-31 18:26:17 +0000 |
commit | 1d6b38d9d37d5de471f5954b23b46dac58136fec (patch) | |
tree | e1a99e3d67f2d9fdd6e7450c67b3c2295055be0e /test/CodeGen/Mips/select.ll | |
parent | 5bb3eced658dfbbca60e183155017481f6159923 (diff) | |
download | external_llvm-1d6b38d9d37d5de471f5954b23b46dac58136fec.zip external_llvm-1d6b38d9d37d5de471f5954b23b46dac58136fec.tar.gz external_llvm-1d6b38d9d37d5de471f5954b23b46dac58136fec.tar.bz2 |
Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/select.ll')
-rw-r--r-- | test/CodeGen/Mips/select.ll | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/select.ll b/test/CodeGen/Mips/select.ll new file mode 100644 index 0000000..c83fa3e --- /dev/null +++ b/test/CodeGen/Mips/select.ll @@ -0,0 +1,196 @@ +; RUN: llc < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2 +; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1 + +@d2 = external global double +@d3 = external global double + +define i32 @sel1(i32 %s, i32 %f0, i32 %f1) nounwind readnone { +entry: +; CHECK-MIPS32R2: movn +; CHECK-MIPS1: beq + %tobool = icmp ne i32 %s, 0 + %cond = select i1 %tobool, i32 %f1, i32 %f0 + ret i32 %cond +} + +define float @sel2(i32 %s, float %f0, float %f1) nounwind readnone { +entry: +; CHECK-MIPS32R2: movn.s +; CHECK-MIPS1: beq + %tobool = icmp ne i32 %s, 0 + %cond = select i1 %tobool, float %f0, float %f1 + ret float %cond +} + +define double @sel2_1(i32 %s, double %f0, double %f1) nounwind readnone { +entry: +; CHECK-MIPS32R2: movn.d +; CHECK-MIPS1: beq + %tobool = icmp ne i32 %s, 0 + %cond = select i1 %tobool, double %f0, double %f1 + ret double %cond +} + +define float @sel3(float %f0, float %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.eq.s +; CHECK-MIPS32R2: movt.s +; CHECK-MIPS1: c.eq.s +; CHECK-MIPS1: bc1f + %cmp = fcmp oeq float %f2, %f3 + %cond = select i1 %cmp, float %f0, float %f1 + ret float %cond +} + +define float @sel4(float %f0, float %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.olt.s +; CHECK-MIPS32R2: movt.s +; CHECK-MIPS1: c.olt.s +; CHECK-MIPS1: bc1f + %cmp = fcmp olt float %f2, %f3 + %cond = select i1 %cmp, float %f0, float %f1 + ret float %cond +} + +define float @sel5(float %f0, float %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.ule.s +; CHECK-MIPS32R2: movf.s +; CHECK-MIPS1: c.ule.s +; CHECK-MIPS1: bc1t + %cmp = fcmp ogt float %f2, %f3 + %cond = select i1 %cmp, float %f0, float %f1 + ret float %cond +} + +define double @sel5_1(double %f0, double %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.ule.s +; CHECK-MIPS32R2: movf.d +; CHECK-MIPS1: c.ule.s +; CHECK-MIPS1: bc1t + %cmp = fcmp ogt float %f2, %f3 + %cond = select i1 %cmp, double %f0, double %f1 + ret double %cond +} + +define double @sel6(double %f0, double %f1, double %f2, double %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.eq.d +; CHECK-MIPS32R2: movt.d +; CHECK-MIPS1: c.eq.d +; CHECK-MIPS1: bc1f + %cmp = fcmp oeq double %f2, %f3 + %cond = select i1 %cmp, double %f0, double %f1 + ret double %cond +} + +define double @sel7(double %f0, double %f1, double %f2, double %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.olt.d +; CHECK-MIPS32R2: movt.d +; CHECK-MIPS1: c.olt.d +; CHECK-MIPS1: bc1f + %cmp = fcmp olt double %f2, %f3 + %cond = select i1 %cmp, double %f0, double %f1 + ret double %cond +} + +define double @sel8(double %f0, double %f1, double %f2, double %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.ule.d +; CHECK-MIPS32R2: movf.d +; CHECK-MIPS1: c.ule.d +; CHECK-MIPS1: bc1t + %cmp = fcmp ogt double %f2, %f3 + %cond = select i1 %cmp, double %f0, double %f1 + ret double %cond +} + +define float @sel8_1(float %f0, float %f1, double %f2, double %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.ule.d +; CHECK-MIPS32R2: movf.s +; CHECK-MIPS1: c.ule.d +; CHECK-MIPS1: bc1t + %cmp = fcmp ogt double %f2, %f3 + %cond = select i1 %cmp, float %f0, float %f1 + ret float %cond +} + +define i32 @sel9(i32 %f0, i32 %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.eq.s +; CHECK-MIPS32R2: movt +; CHECK-MIPS1: c.eq.s +; CHECK-MIPS1: bc1f + %cmp = fcmp oeq float %f2, %f3 + %cond = select i1 %cmp, i32 %f0, i32 %f1 + ret i32 %cond +} + +define i32 @sel10(i32 %f0, i32 %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.olt.s +; CHECK-MIPS32R2: movt +; CHECK-MIPS1: c.olt.s +; CHECK-MIPS1: bc1f + %cmp = fcmp olt float %f2, %f3 + %cond = select i1 %cmp, i32 %f0, i32 %f1 + ret i32 %cond +} + +define i32 @sel11(i32 %f0, i32 %f1, float %f2, float %f3) nounwind readnone { +entry: +; CHECK-MIPS32R2: c.ule.s +; CHECK-MIPS32R2: movf +; CHECK-MIPS1: c.ule.s +; CHECK-MIPS1: bc1t + %cmp = fcmp ogt float %f2, %f3 + %cond = select i1 %cmp, i32 %f0, i32 %f1 + ret i32 %cond +} + +define i32 @sel12(i32 %f0, i32 %f1) nounwind readonly { +entry: +; CHECK-MIPS32R2: c.eq.d +; CHECK-MIPS32R2: movt +; CHECK-MIPS1: c.eq.d +; CHECK-MIPS1: bc1f + %tmp = load double* @d2, align 8, !tbaa !0 + %tmp1 = load double* @d3, align 8, !tbaa !0 + %cmp = fcmp oeq double %tmp, %tmp1 + %cond = select i1 %cmp, i32 %f0, i32 %f1 + ret i32 %cond +} + +define i32 @sel13(i32 %f0, i32 %f1) nounwind readonly { +entry: +; CHECK-MIPS32R2: c.olt.d +; CHECK-MIPS32R2: movt +; CHECK-MIPS1: c.olt.d +; CHECK-MIPS1: bc1f + %tmp = load double* @d2, align 8, !tbaa !0 + %tmp1 = load double* @d3, align 8, !tbaa !0 + %cmp = fcmp olt double %tmp, %tmp1 + %cond = select i1 %cmp, i32 %f0, i32 %f1 + ret i32 %cond +} + +define i32 @sel14(i32 %f0, i32 %f1) nounwind readonly { +entry: +; CHECK-MIPS32R2: c.ule.d +; CHECK-MIPS32R2: movf +; CHECK-MIPS1: c.ule.d +; CHECK-MIPS1: bc1t + %tmp = load double* @d2, align 8, !tbaa !0 + %tmp1 = load double* @d3, align 8, !tbaa !0 + %cmp = fcmp ogt double %tmp, %tmp1 + %cond = select i1 %cmp, i32 %f0, i32 %f1 + ret i32 %cond +} + +!0 = metadata !{metadata !"double", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} |