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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
commit | 24e79e55daa5d2812d2a5ea0a282ebe48ef465e6 (patch) | |
tree | be3518122bdf9eb86282e31e2e212da07cc2754b /test/CodeGen/Mips/sub2.ll | |
parent | dcc4436cddc9b5d155040ed3ed38e9070ec4e3b8 (diff) | |
download | external_llvm-24e79e55daa5d2812d2a5ea0a282ebe48ef465e6.zip external_llvm-24e79e55daa5d2812d2a5ea0a282ebe48ef465e6.tar.gz external_llvm-24e79e55daa5d2812d2a5ea0a282ebe48ef465e6.tar.bz2 |
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
Change these to patterns.
2. Add another 16 instructions.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161272 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/sub2.ll')
-rw-r--r-- | test/CodeGen/Mips/sub2.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/sub2.ll b/test/CodeGen/Mips/sub2.ll new file mode 100644 index 0000000..4f6bfcc --- /dev/null +++ b/test/CodeGen/Mips/sub2.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 20, align 4 +@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @j, align 4 + %1 = load i32* @i, align 4 + %sub = sub nsw i32 %0, %1 +; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %sub) + ret i32 0 +} + +declare i32 @printf(i8*, ...) |