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author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/R600/load.ll | |
parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/R600/load.ll')
-rw-r--r-- | test/CodeGen/R600/load.ll | 597 |
1 files changed, 299 insertions, 298 deletions
diff --git a/test/CodeGen/R600/load.ll b/test/CodeGen/R600/load.ll index 62d3063..b71b7cb 100644 --- a/test/CodeGen/R600/load.ll +++ b/test/CodeGen/R600/load.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK --check-prefix=FUNC %s -; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600-CHECK --check-prefix=FUNC %s -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s +; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600 --check-prefix=FUNC %s +; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s ;===------------------------------------------------------------------------===; ; GLOBAL ADDRESS SPACE @@ -8,9 +9,9 @@ ; Load an i8 value from the global address space. ; FUNC-LABEL: {{^}}load_i8: -; R600-CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} +; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} -; SI-CHECK: buffer_load_ubyte v{{[0-9]+}}, +; SI: buffer_load_ubyte v{{[0-9]+}}, define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { %1 = load i8 addrspace(1)* %in %2 = zext i8 %1 to i32 @@ -19,12 +20,12 @@ define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { } ; FUNC-LABEL: {{^}}load_i8_sext: -; R600-CHECK: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]] -; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] -; R600-CHECK: 24 -; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] -; R600-CHECK: 24 -; SI-CHECK: buffer_load_sbyte +; R600: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]] +; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] +; R600: 24 +; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] +; R600: 24 +; SI: buffer_load_sbyte define void @load_i8_sext(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { entry: %0 = load i8 addrspace(1)* %in @@ -34,10 +35,10 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i8: -; R600-CHECK: VTX_READ_8 -; R600-CHECK: VTX_READ_8 -; SI-CHECK: buffer_load_ubyte -; SI-CHECK: buffer_load_ubyte +; R600: VTX_READ_8 +; R600: VTX_READ_8 +; SI: buffer_load_ubyte +; SI: buffer_load_ubyte define void @load_v2i8(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) { entry: %0 = load <2 x i8> addrspace(1)* %in @@ -47,18 +48,18 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i8_sext: -; R600-CHECK-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] -; R600-CHECK-DAG: 24 -; SI-CHECK: buffer_load_sbyte -; SI-CHECK: buffer_load_sbyte +; R600-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] +; R600-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] +; R600-DAG: 24 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] +; R600-DAG: 24 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] +; R600-DAG: 24 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] +; R600-DAG: 24 +; SI: buffer_load_sbyte +; SI: buffer_load_sbyte define void @load_v2i8_sext(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) { entry: %0 = load <2 x i8> addrspace(1)* %in @@ -68,14 +69,14 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i8: -; R600-CHECK: VTX_READ_8 -; R600-CHECK: VTX_READ_8 -; R600-CHECK: VTX_READ_8 -; R600-CHECK: VTX_READ_8 -; SI-CHECK: buffer_load_ubyte -; SI-CHECK: buffer_load_ubyte -; SI-CHECK: buffer_load_ubyte -; SI-CHECK: buffer_load_ubyte +; R600: VTX_READ_8 +; R600: VTX_READ_8 +; R600: VTX_READ_8 +; R600: VTX_READ_8 +; SI: buffer_load_ubyte +; SI: buffer_load_ubyte +; SI: buffer_load_ubyte +; SI: buffer_load_ubyte define void @load_v4i8(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) { entry: %0 = load <4 x i8> addrspace(1)* %in @@ -85,30 +86,30 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i8_sext: -; R600-CHECK-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: VTX_READ_8 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]] -; R600-CHECK-DAG: VTX_READ_8 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]] -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Z_CHAN:[XYZW]]], [[DST_Z]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Z_CHAN]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_W_CHAN:[XYZW]]], [[DST_W]] -; R600-CHECK-DAG: 24 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_W_CHAN]] -; R600-CHECK-DAG: 24 -; SI-CHECK: buffer_load_sbyte -; SI-CHECK: buffer_load_sbyte -; SI-CHECK: buffer_load_sbyte -; SI-CHECK: buffer_load_sbyte +; R600-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] +; R600-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] +; R600-DAG: VTX_READ_8 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]] +; R600-DAG: VTX_READ_8 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]] +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] +; R600-DAG: 24 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] +; R600-DAG: 24 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] +; R600-DAG: 24 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] +; R600-DAG: 24 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Z_CHAN:[XYZW]]], [[DST_Z]] +; R600-DAG: 24 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Z_CHAN]] +; R600-DAG: 24 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_W_CHAN:[XYZW]]], [[DST_W]] +; R600-DAG: 24 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_W_CHAN]] +; R600-DAG: 24 +; SI: buffer_load_sbyte +; SI: buffer_load_sbyte +; SI: buffer_load_sbyte +; SI: buffer_load_sbyte define void @load_v4i8_sext(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) { entry: %0 = load <4 x i8> addrspace(1)* %in @@ -119,8 +120,8 @@ entry: ; Load an i16 value from the global address space. ; FUNC-LABEL: {{^}}load_i16: -; R600-CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} -; SI-CHECK: buffer_load_ushort +; R600: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI: buffer_load_ushort define void @load_i16(i32 addrspace(1)* %out, i16 addrspace(1)* %in) { entry: %0 = load i16 addrspace(1)* %in @@ -130,12 +131,12 @@ entry: } ; FUNC-LABEL: {{^}}load_i16_sext: -; R600-CHECK: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]] -; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] -; R600-CHECK: 16 -; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] -; R600-CHECK: 16 -; SI-CHECK: buffer_load_sshort +; R600: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]] +; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] +; R600: 16 +; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] +; R600: 16 +; SI: buffer_load_sshort define void @load_i16_sext(i32 addrspace(1)* %out, i16 addrspace(1)* %in) { entry: %0 = load i16 addrspace(1)* %in @@ -145,10 +146,10 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i16: -; R600-CHECK: VTX_READ_16 -; R600-CHECK: VTX_READ_16 -; SI-CHECK: buffer_load_ushort -; SI-CHECK: buffer_load_ushort +; R600: VTX_READ_16 +; R600: VTX_READ_16 +; SI: buffer_load_ushort +; SI: buffer_load_ushort define void @load_v2i16(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) { entry: %0 = load <2 x i16> addrspace(1)* %in @@ -158,18 +159,18 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i16_sext: -; R600-CHECK-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] -; R600-CHECK-DAG: 16 -; SI-CHECK: buffer_load_sshort -; SI-CHECK: buffer_load_sshort +; R600-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] +; R600-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] +; R600-DAG: 16 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] +; R600-DAG: 16 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] +; R600-DAG: 16 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] +; R600-DAG: 16 +; SI: buffer_load_sshort +; SI: buffer_load_sshort define void @load_v2i16_sext(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) { entry: %0 = load <2 x i16> addrspace(1)* %in @@ -179,14 +180,14 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i16: -; R600-CHECK: VTX_READ_16 -; R600-CHECK: VTX_READ_16 -; R600-CHECK: VTX_READ_16 -; R600-CHECK: VTX_READ_16 -; SI-CHECK: buffer_load_ushort -; SI-CHECK: buffer_load_ushort -; SI-CHECK: buffer_load_ushort -; SI-CHECK: buffer_load_ushort +; R600: VTX_READ_16 +; R600: VTX_READ_16 +; R600: VTX_READ_16 +; R600: VTX_READ_16 +; SI: buffer_load_ushort +; SI: buffer_load_ushort +; SI: buffer_load_ushort +; SI: buffer_load_ushort define void @load_v4i16(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) { entry: %0 = load <4 x i16> addrspace(1)* %in @@ -196,30 +197,30 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i16_sext: -; R600-CHECK-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: VTX_READ_16 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]] -; R600-CHECK-DAG: VTX_READ_16 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]] -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Z_CHAN:[XYZW]]], [[DST_Z]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Z_CHAN]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_W_CHAN:[XYZW]]], [[DST_W]] -; R600-CHECK-DAG: 16 -; R600-CHECK-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_W_CHAN]] -; R600-CHECK-DAG: 16 -; SI-CHECK: buffer_load_sshort -; SI-CHECK: buffer_load_sshort -; SI-CHECK: buffer_load_sshort -; SI-CHECK: buffer_load_sshort +; R600-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]] +; R600-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]] +; R600-DAG: VTX_READ_16 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]] +; R600-DAG: VTX_READ_16 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]] +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]] +; R600-DAG: 16 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]] +; R600-DAG: 16 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]] +; R600-DAG: 16 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]] +; R600-DAG: 16 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Z_CHAN:[XYZW]]], [[DST_Z]] +; R600-DAG: 16 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Z_CHAN]] +; R600-DAG: 16 +; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_W_CHAN:[XYZW]]], [[DST_W]] +; R600-DAG: 16 +; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_W_CHAN]] +; R600-DAG: 16 +; SI: buffer_load_sshort +; SI: buffer_load_sshort +; SI: buffer_load_sshort +; SI: buffer_load_sshort define void @load_v4i16_sext(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) { entry: %0 = load <4 x i16> addrspace(1)* %in @@ -230,9 +231,9 @@ entry: ; load an i32 value from the global address space. ; FUNC-LABEL: {{^}}load_i32: -; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 +; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 -; SI-CHECK: buffer_load_dword v{{[0-9]+}} +; SI: buffer_load_dword v{{[0-9]+}} define void @load_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { entry: %0 = load i32 addrspace(1)* %in @@ -242,9 +243,9 @@ entry: ; load a f32 value from the global address space. ; FUNC-LABEL: {{^}}load_f32: -; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 +; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 -; SI-CHECK: buffer_load_dword v{{[0-9]+}} +; SI: buffer_load_dword v{{[0-9]+}} define void @load_f32(float addrspace(1)* %out, float addrspace(1)* %in) { entry: %0 = load float addrspace(1)* %in @@ -254,9 +255,9 @@ entry: ; load a v2f32 value from the global address space ; FUNC-LABEL: {{^}}load_v2f32: -; R600-CHECK: MEM_RAT -; R600-CHECK: VTX_READ_64 -; SI-CHECK: buffer_load_dwordx2 +; R600: MEM_RAT +; R600: VTX_READ_64 +; SI: buffer_load_dwordx2 define void @load_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in) { entry: %0 = load <2 x float> addrspace(1)* %in @@ -265,8 +266,8 @@ entry: } ; FUNC-LABEL: {{^}}load_i64: -; R600-CHECK: VTX_READ_64 -; SI-CHECK: buffer_load_dwordx2 +; R600: VTX_READ_64 +; SI: buffer_load_dwordx2 define void @load_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) { entry: %0 = load i64 addrspace(1)* %in @@ -275,11 +276,11 @@ entry: } ; FUNC-LABEL: {{^}}load_i64_sext: -; R600-CHECK: MEM_RAT -; R600-CHECK: MEM_RAT -; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, T{{[0-9]\.[XYZW]}}, literal.x -; R600-CHECK: 31 -; SI-CHECK: buffer_load_dword +; R600: MEM_RAT +; R600: MEM_RAT +; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, T{{[0-9]\.[XYZW]}}, literal.x +; R600: 31 +; SI: buffer_load_dword define void @load_i64_sext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) { entry: @@ -290,8 +291,8 @@ entry: } ; FUNC-LABEL: {{^}}load_i64_zext: -; R600-CHECK: MEM_RAT -; R600-CHECK: MEM_RAT +; R600: MEM_RAT +; R600: MEM_RAT define void @load_i64_zext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) { entry: %0 = load i32 addrspace(1)* %in @@ -301,17 +302,17 @@ entry: } ; FUNC-LABEL: {{^}}load_v8i32: -; R600-CHECK: VTX_READ_128 -; R600-CHECK: VTX_READ_128 +; R600: VTX_READ_128 +; R600: VTX_READ_128 ; XXX: We should be using DWORDX4 instructions on SI. -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword define void @load_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(1)* %in) { entry: %0 = load <8 x i32> addrspace(1)* %in @@ -320,27 +321,27 @@ entry: } ; FUNC-LABEL: {{^}}load_v16i32: -; R600-CHECK: VTX_READ_128 -; R600-CHECK: VTX_READ_128 -; R600-CHECK: VTX_READ_128 -; R600-CHECK: VTX_READ_128 +; R600: VTX_READ_128 +; R600: VTX_READ_128 +; R600: VTX_READ_128 +; R600: VTX_READ_128 ; XXX: We should be using DWORDX4 instructions on SI. -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword -; SI-CHECK: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword +; SI: buffer_load_dword define void @load_v16i32(<16 x i32> addrspace(1)* %out, <16 x i32> addrspace(1)* %in) { entry: %0 = load <16 x i32> addrspace(1)* %in @@ -354,12 +355,12 @@ entry: ; Load a sign-extended i8 value ; FUNC-LABEL: {{^}}load_const_i8_sext: -; R600-CHECK: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]] -; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] -; R600-CHECK: 24 -; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] -; R600-CHECK: 24 -; SI-CHECK: buffer_load_sbyte v{{[0-9]+}}, +; R600: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]] +; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] +; R600: 24 +; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] +; R600: 24 +; SI: buffer_load_sbyte v{{[0-9]+}}, define void @load_const_i8_sext(i32 addrspace(1)* %out, i8 addrspace(2)* %in) { entry: %0 = load i8 addrspace(2)* %in @@ -370,8 +371,8 @@ entry: ; Load an aligned i8 value ; FUNC-LABEL: {{^}}load_const_i8_aligned: -; R600-CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} -; SI-CHECK: buffer_load_ubyte v{{[0-9]+}}, +; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI: buffer_load_ubyte v{{[0-9]+}}, define void @load_const_i8_aligned(i32 addrspace(1)* %out, i8 addrspace(2)* %in) { entry: %0 = load i8 addrspace(2)* %in @@ -382,8 +383,8 @@ entry: ; Load an un-aligned i8 value ; FUNC-LABEL: {{^}}load_const_i8_unaligned: -; R600-CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} -; SI-CHECK: buffer_load_ubyte v{{[0-9]+}}, +; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI: buffer_load_ubyte v{{[0-9]+}}, define void @load_const_i8_unaligned(i32 addrspace(1)* %out, i8 addrspace(2)* %in) { entry: %0 = getelementptr i8 addrspace(2)* %in, i32 1 @@ -395,12 +396,12 @@ entry: ; Load a sign-extended i16 value ; FUNC-LABEL: {{^}}load_const_i16_sext: -; R600-CHECK: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]] -; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] -; R600-CHECK: 16 -; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] -; R600-CHECK: 16 -; SI-CHECK: buffer_load_sshort +; R600: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]] +; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] +; R600: 16 +; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] +; R600: 16 +; SI: buffer_load_sshort define void @load_const_i16_sext(i32 addrspace(1)* %out, i16 addrspace(2)* %in) { entry: %0 = load i16 addrspace(2)* %in @@ -411,8 +412,8 @@ entry: ; Load an aligned i16 value ; FUNC-LABEL: {{^}}load_const_i16_aligned: -; R600-CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} -; SI-CHECK: buffer_load_ushort +; R600: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI: buffer_load_ushort define void @load_const_i16_aligned(i32 addrspace(1)* %out, i16 addrspace(2)* %in) { entry: %0 = load i16 addrspace(2)* %in @@ -423,8 +424,8 @@ entry: ; Load an un-aligned i16 value ; FUNC-LABEL: {{^}}load_const_i16_unaligned: -; R600-CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} -; SI-CHECK: buffer_load_ushort +; R600: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI: buffer_load_ushort define void @load_const_i16_unaligned(i32 addrspace(1)* %out, i16 addrspace(2)* %in) { entry: %0 = getelementptr i16 addrspace(2)* %in, i32 1 @@ -436,9 +437,9 @@ entry: ; Load an i32 value from the constant address space. ; FUNC-LABEL: {{^}}load_const_addrspace_i32: -; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 +; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 -; SI-CHECK: s_load_dword s{{[0-9]+}} +; SI: s_load_dword s{{[0-9]+}} define void @load_const_addrspace_i32(i32 addrspace(1)* %out, i32 addrspace(2)* %in) { entry: %0 = load i32 addrspace(2)* %in @@ -448,9 +449,9 @@ entry: ; Load a f32 value from the constant address space. ; FUNC-LABEL: {{^}}load_const_addrspace_f32: -; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 +; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 -; SI-CHECK: s_load_dword s{{[0-9]+}} +; SI: s_load_dword s{{[0-9]+}} define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(2)* %in) { %1 = load float addrspace(2)* %in store float %1, float addrspace(1)* %out @@ -463,10 +464,10 @@ define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace( ; Load an i8 value from the local address space. ; FUNC-LABEL: {{^}}load_i8_local: -; R600-CHECK: LDS_UBYTE_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_u8 +; R600: LDS_UBYTE_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_u8 define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) { %1 = load i8 addrspace(3)* %in %2 = zext i8 %1 to i32 @@ -475,11 +476,11 @@ define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) { } ; FUNC-LABEL: {{^}}load_i8_sext_local: -; R600-CHECK: LDS_UBYTE_READ_RET -; R600-CHECK: ASHR -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_i8 +; R600: LDS_UBYTE_READ_RET +; R600: ASHR +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_i8 define void @load_i8_sext_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) { entry: %0 = load i8 addrspace(3)* %in @@ -489,12 +490,12 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i8_local: -; R600-CHECK: LDS_UBYTE_READ_RET -; R600-CHECK: LDS_UBYTE_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_u8 -; SI-CHECK: ds_read_u8 +; R600: LDS_UBYTE_READ_RET +; R600: LDS_UBYTE_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_u8 +; SI: ds_read_u8 define void @load_v2i8_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) { entry: %0 = load <2 x i8> addrspace(3)* %in @@ -504,14 +505,14 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i8_sext_local: -; R600-CHECK-DAG: LDS_UBYTE_READ_RET -; R600-CHECK-DAG: LDS_UBYTE_READ_RET -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_i8 -; SI-CHECK: ds_read_i8 +; R600-DAG: LDS_UBYTE_READ_RET +; R600-DAG: LDS_UBYTE_READ_RET +; R600-DAG: ASHR +; R600-DAG: ASHR +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_i8 +; SI: ds_read_i8 define void @load_v2i8_sext_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) { entry: %0 = load <2 x i8> addrspace(3)* %in @@ -521,16 +522,16 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i8_local: -; R600-CHECK: LDS_UBYTE_READ_RET -; R600-CHECK: LDS_UBYTE_READ_RET -; R600-CHECK: LDS_UBYTE_READ_RET -; R600-CHECK: LDS_UBYTE_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_u8 -; SI-CHECK: ds_read_u8 -; SI-CHECK: ds_read_u8 -; SI-CHECK: ds_read_u8 +; R600: LDS_UBYTE_READ_RET +; R600: LDS_UBYTE_READ_RET +; R600: LDS_UBYTE_READ_RET +; R600: LDS_UBYTE_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 define void @load_v4i8_local(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(3)* %in) { entry: %0 = load <4 x i8> addrspace(3)* %in @@ -540,20 +541,20 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i8_sext_local: -; R600-CHECK-DAG: LDS_UBYTE_READ_RET -; R600-CHECK-DAG: LDS_UBYTE_READ_RET -; R600-CHECK-DAG: LDS_UBYTE_READ_RET -; R600-CHECK-DAG: LDS_UBYTE_READ_RET -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_i8 -; SI-CHECK: ds_read_i8 -; SI-CHECK: ds_read_i8 -; SI-CHECK: ds_read_i8 +; R600-DAG: LDS_UBYTE_READ_RET +; R600-DAG: LDS_UBYTE_READ_RET +; R600-DAG: LDS_UBYTE_READ_RET +; R600-DAG: LDS_UBYTE_READ_RET +; R600-DAG: ASHR +; R600-DAG: ASHR +; R600-DAG: ASHR +; R600-DAG: ASHR +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_i8 +; SI: ds_read_i8 +; SI: ds_read_i8 +; SI: ds_read_i8 define void @load_v4i8_sext_local(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(3)* %in) { entry: %0 = load <4 x i8> addrspace(3)* %in @@ -564,10 +565,10 @@ entry: ; Load an i16 value from the local address space. ; FUNC-LABEL: {{^}}load_i16_local: -; R600-CHECK: LDS_USHORT_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_u16 +; R600: LDS_USHORT_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_u16 define void @load_i16_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) { entry: %0 = load i16 addrspace(3)* %in @@ -577,11 +578,11 @@ entry: } ; FUNC-LABEL: {{^}}load_i16_sext_local: -; R600-CHECK: LDS_USHORT_READ_RET -; R600-CHECK: ASHR -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_i16 +; R600: LDS_USHORT_READ_RET +; R600: ASHR +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_i16 define void @load_i16_sext_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) { entry: %0 = load i16 addrspace(3)* %in @@ -591,12 +592,12 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i16_local: -; R600-CHECK: LDS_USHORT_READ_RET -; R600-CHECK: LDS_USHORT_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_u16 -; SI-CHECK: ds_read_u16 +; R600: LDS_USHORT_READ_RET +; R600: LDS_USHORT_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_u16 +; SI: ds_read_u16 define void @load_v2i16_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) { entry: %0 = load <2 x i16> addrspace(3)* %in @@ -606,14 +607,14 @@ entry: } ; FUNC-LABEL: {{^}}load_v2i16_sext_local: -; R600-CHECK-DAG: LDS_USHORT_READ_RET -; R600-CHECK-DAG: LDS_USHORT_READ_RET -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_i16 -; SI-CHECK: ds_read_i16 +; R600-DAG: LDS_USHORT_READ_RET +; R600-DAG: LDS_USHORT_READ_RET +; R600-DAG: ASHR +; R600-DAG: ASHR +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_i16 +; SI: ds_read_i16 define void @load_v2i16_sext_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) { entry: %0 = load <2 x i16> addrspace(3)* %in @@ -623,16 +624,16 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i16_local: -; R600-CHECK: LDS_USHORT_READ_RET -; R600-CHECK: LDS_USHORT_READ_RET -; R600-CHECK: LDS_USHORT_READ_RET -; R600-CHECK: LDS_USHORT_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_u16 -; SI-CHECK: ds_read_u16 -; SI-CHECK: ds_read_u16 -; SI-CHECK: ds_read_u16 +; R600: LDS_USHORT_READ_RET +; R600: LDS_USHORT_READ_RET +; R600: LDS_USHORT_READ_RET +; R600: LDS_USHORT_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_u16 +; SI: ds_read_u16 +; SI: ds_read_u16 +; SI: ds_read_u16 define void @load_v4i16_local(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(3)* %in) { entry: %0 = load <4 x i16> addrspace(3)* %in @@ -642,20 +643,20 @@ entry: } ; FUNC-LABEL: {{^}}load_v4i16_sext_local: -; R600-CHECK-DAG: LDS_USHORT_READ_RET -; R600-CHECK-DAG: LDS_USHORT_READ_RET -; R600-CHECK-DAG: LDS_USHORT_READ_RET -; R600-CHECK-DAG: LDS_USHORT_READ_RET -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; R600-CHECK-DAG: ASHR -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_i16 -; SI-CHECK: ds_read_i16 -; SI-CHECK: ds_read_i16 -; SI-CHECK: ds_read_i16 +; R600-DAG: LDS_USHORT_READ_RET +; R600-DAG: LDS_USHORT_READ_RET +; R600-DAG: LDS_USHORT_READ_RET +; R600-DAG: LDS_USHORT_READ_RET +; R600-DAG: ASHR +; R600-DAG: ASHR +; R600-DAG: ASHR +; R600-DAG: ASHR +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_i16 +; SI: ds_read_i16 +; SI: ds_read_i16 +; SI: ds_read_i16 define void @load_v4i16_sext_local(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(3)* %in) { entry: %0 = load <4 x i16> addrspace(3)* %in @@ -666,10 +667,10 @@ entry: ; load an i32 value from the local address space. ; FUNC-LABEL: {{^}}load_i32_local: -; R600-CHECK: LDS_READ_RET -; SI-CHECK-NOT: s_wqm_b64 -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_b32 +; R600: LDS_READ_RET +; SI-NOT: s_wqm_b64 +; SI: s_mov_b32 m0 +; SI: ds_read_b32 define void @load_i32_local(i32 addrspace(1)* %out, i32 addrspace(3)* %in) { entry: %0 = load i32 addrspace(3)* %in @@ -679,9 +680,9 @@ entry: ; load a f32 value from the local address space. ; FUNC-LABEL: {{^}}load_f32_local: -; R600-CHECK: LDS_READ_RET -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_b32 +; R600: LDS_READ_RET +; SI: s_mov_b32 m0 +; SI: ds_read_b32 define void @load_f32_local(float addrspace(1)* %out, float addrspace(3)* %in) { entry: %0 = load float addrspace(3)* %in @@ -691,10 +692,10 @@ entry: ; load a v2f32 value from the local address space ; FUNC-LABEL: {{^}}load_v2f32_local: -; R600-CHECK: LDS_READ_RET -; R600-CHECK: LDS_READ_RET -; SI-CHECK: s_mov_b32 m0 -; SI-CHECK: ds_read_b64 +; R600: LDS_READ_RET +; R600: LDS_READ_RET +; SI: s_mov_b32 m0 +; SI: ds_read_b64 define void @load_v2f32_local(<2 x float> addrspace(1)* %out, <2 x float> addrspace(3)* %in) { entry: %0 = load <2 x float> addrspace(3)* %in @@ -704,11 +705,11 @@ entry: ; Test loading a i32 and v2i32 value from the same base pointer. ; FUNC-LABEL: {{^}}load_i32_v2i32_local: -; R600-CHECK: LDS_READ_RET -; R600-CHECK: LDS_READ_RET -; R600-CHECK: LDS_READ_RET -; SI-CHECK-DAG: ds_read_b32 -; SI-CHECK-DAG: ds_read2_b32 +; R600: LDS_READ_RET +; R600: LDS_READ_RET +; R600: LDS_READ_RET +; SI-DAG: ds_read_b32 +; SI-DAG: ds_read2_b32 define void @load_i32_v2i32_local(<2 x i32> addrspace(1)* %out, i32 addrspace(3)* %in) { %scalar = load i32 addrspace(3)* %in %tmp0 = bitcast i32 addrspace(3)* %in to <2 x i32> addrspace(3)* @@ -726,9 +727,9 @@ define void @load_i32_v2i32_local(<2 x i32> addrspace(1)* %out, i32 addrspace(3) ; On SI we need to make sure that the base offset is a register and not ; an immediate. ; FUNC-LABEL: {{^}}load_i32_local_const_ptr: -; SI-CHECK: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0 -; SI-CHECK: ds_read_b32 v0, v[[ZERO]] offset:4 -; R600-CHECK: LDS_READ_RET +; SI: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0 +; SI: ds_read_b32 v0, v[[ZERO]] offset:4 +; R600: LDS_READ_RET define void @load_i32_local_const_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %in) { entry: %tmp0 = getelementptr [512 x i32] addrspace(3)* @lds, i32 0, i32 1 |