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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-17 15:18:27 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-17 15:18:27 +0000 |
| commit | 1e81966626635c99bcb77d9291b7f185f2159e2b (patch) | |
| tree | 364e927a8a42392926033780cbef2d996489e99d /test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll | |
| parent | ba6fc63eb291abb40ddf05ef91642a9cac9a90d1 (diff) | |
| download | external_llvm-1e81966626635c99bcb77d9291b7f185f2159e2b.zip external_llvm-1e81966626635c99bcb77d9291b7f185f2159e2b.tar.gz external_llvm-1e81966626635c99bcb77d9291b7f185f2159e2b.tar.bz2 | |
Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll index 71ff68a..7ee1986 100644 --- a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll +++ b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll @@ -13,7 +13,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- ; CHECK: InlineAsm End ; CHECK: cmp ; CHECK: beq -define arm_apcscc void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind { +define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind { entry: %tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0 volatile store i32 1, i32* %tmp1, align 4 @@ -32,9 +32,9 @@ entry: %tmp19 = getelementptr inbounds %s1* %this, i32 0, i32 10 store i64 0, i64* %tmp19, align 4 %tmp20 = getelementptr inbounds %s1* %this, i32 0, i32 0 - tail call arm_apcscc void @f1(%s3* %tmp20, i32* %s) nounwind + tail call void @f1(%s3* %tmp20, i32* %s) nounwind %tmp21 = shl i32 %format, 6 - %tmp22 = tail call arm_apcscc zeroext i8 @f2(i32 %format) nounwind + %tmp22 = tail call zeroext i8 @f2(i32 %format) nounwind %toBoolnot = icmp eq i8 %tmp22, 0 %tmp23 = zext i1 %toBoolnot to i32 %flags.0 = or i32 %tmp23, %tmp21 @@ -59,5 +59,5 @@ return: ret void } -declare arm_apcscc void @f1(%s3*, i32*) -declare arm_apcscc zeroext i8 @f2(i32) +declare void @f1(%s3*, i32*) +declare zeroext i8 @f2(i32) |