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author | Evan Cheng <evan.cheng@apple.com> | 2011-01-20 08:34:58 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-01-20 08:34:58 +0000 |
commit | 9fe2009956fc40f3aea46fb3c38dcfb61c4aca46 (patch) | |
tree | fe7f9182beb36b75873546f190e5a2caa6b49a14 /test/CodeGen/Thumb | |
parent | 59315d1d54de6d9a8d721542c9ae251a00cff1ed (diff) | |
download | external_llvm-9fe2009956fc40f3aea46fb3c38dcfb61c4aca46.zip external_llvm-9fe2009956fc40f3aea46fb3c38dcfb61c4aca46.tar.gz external_llvm-9fe2009956fc40f3aea46fb3c38dcfb61c4aca46.tar.bz2 |
Sorry, several patches in one.
TargetInstrInfo:
Change produceSameValue() to take MachineRegisterInfo as an optional argument.
When in SSA form, targets can use it to make more aggressive equality analysis.
Machine LICM:
1. Eliminate isLoadFromConstantMemory, use MI.isInvariantLoad instead.
2. Fix a bug which prevent CSE of instructions which are not re-materializable.
3. Use improved form of produceSameValue.
ARM:
1. Teach ARM produceSameValue to look pass some PIC labels.
2. Look for operands from different loads of different constant pool entries
which have same values.
3. Re-implement PIC GA materialization using movw + movt. Combine the pair with
a "add pc" or "ldr [pc]" to form pseudo instructions. This makes it possible
to re-materialize the instruction, allow machine LICM to hoist the set of
instructions out of the loop and make it possible to CSE them. It's a bit
hacky, but it significantly improve code quality.
4. Some minor bug fixes as well.
With the fixes, using movw + movt to materialize GAs significantly outperform the
load from constantpool method. 186.crafty and 255.vortex improved > 20%, 254.gap
and 176.gcc ~10%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123905 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb')
-rw-r--r-- | test/CodeGen/Thumb/machine-licm.ll | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/test/CodeGen/Thumb/machine-licm.ll b/test/CodeGen/Thumb/machine-licm.ll deleted file mode 100644 index a87e82c..0000000 --- a/test/CodeGen/Thumb/machine-licm.ll +++ /dev/null @@ -1,41 +0,0 @@ -; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -; rdar://7353541 -; rdar://7354376 - -; The generated code is no where near ideal. It's not recognizing the two -; constantpool entries being loaded can be merged into one. - -@GV = external global i32 ; <i32*> [#uses=2] - -define void @t(i32* nocapture %vals, i32 %c) nounwind { -entry: -; CHECK: t: - %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] - br i1 %0, label %return, label %bb.nph - -bb.nph: ; preds = %entry -; CHECK: BB#1 -; CHECK: ldr.n r2, LCPI0_0 -; CHECK: add r2, pc -; CHECK: ldr r{{[0-9]+}}, [r2] -; CHECK: LBB0_2 -; CHECK: LCPI0_0: -; CHECK-NOT: LCPI0_1: -; CHECK: .section - %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] - br label %bb - -bb: ; preds = %bb, %bb.nph - %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ] ; <i32> [#uses=1] - %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ] ; <i32> [#uses=2] - %scevgep = getelementptr i32* %vals, i32 %i.03 ; <i32*> [#uses=1] - %2 = load i32* %scevgep, align 4 ; <i32> [#uses=1] - %3 = add nsw i32 %1, %2 ; <i32> [#uses=2] - store i32 %3, i32* @GV, align 4 - %4 = add i32 %i.03, 1 ; <i32> [#uses=2] - %exitcond = icmp eq i32 %4, %c ; <i1> [#uses=1] - br i1 %exitcond, label %return, label %bb - -return: ; preds = %bb, %entry - ret void -} |