diff options
author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
---|---|---|
committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/X86/commute-clmul.ll | |
parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/X86/commute-clmul.ll')
-rw-r--r-- | test/CodeGen/X86/commute-clmul.ll | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/test/CodeGen/X86/commute-clmul.ll b/test/CodeGen/X86/commute-clmul.ll new file mode 100644 index 0000000..fe3e556 --- /dev/null +++ b/test/CodeGen/X86/commute-clmul.ll @@ -0,0 +1,60 @@ +; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+sse2,+pclmul < %s | FileCheck %s --check-prefix=SSE +; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+avx2,+pclmul < %s | FileCheck %s --check-prefix=AVX + +declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone + +define <2 x i64> @commute_lq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 { + ;SSE-LABEL: commute_lq_lq + ;SSE: pclmulqdq $0, (%rdi), %xmm0 + ;SSE-NEXT: retq + + ;AVX-LABEL: commute_lq_lq + ;AVX: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 + ;AVX-NEXT: retq + + %1 = load <2 x i64>* %a0 + %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 0) + ret <2 x i64> %2 +} + +define <2 x i64> @commute_lq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 { + ;SSE-LABEL: commute_lq_hq + ;SSE: pclmulqdq $1, (%rdi), %xmm0 + ;SSE-NEXT: retq + + ;AVX-LABEL: commute_lq_hq + ;AVX: vpclmulqdq $1, (%rdi), %xmm0, %xmm0 + ;AVX-NEXT: retq + + %1 = load <2 x i64>* %a0 + %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 16) + ret <2 x i64> %2 +} + +define <2 x i64> @commute_hq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 { + ;SSE-LABEL: commute_hq_lq + ;SSE: pclmulqdq $16, (%rdi), %xmm0 + ;SSE-NEXT: retq + + ;AVX-LABEL: commute_hq_lq + ;AVX: vpclmulqdq $16, (%rdi), %xmm0, %xmm0 + ;AVX-NEXT: retq + + %1 = load <2 x i64>* %a0 + %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 1) + ret <2 x i64> %2 +} + +define <2 x i64> @commute_hq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 { + ;SSE-LABEL: commute_hq_hq + ;SSE: pclmulqdq $17, (%rdi), %xmm0 + ;SSE-NEXT: retq + + ;AVX-LABEL: commute_hq_hq + ;AVX: vpclmulqdq $17, (%rdi), %xmm0, %xmm0 + ;AVX-NEXT: retq + + %1 = load <2 x i64>* %a0 + %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 17) + ret <2 x i64> %2 +} |