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| author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
| commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
| tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/X86/vselect-2.ll | |
| parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
| download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 | |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/X86/vselect-2.ll')
| -rw-r--r-- | test/CodeGen/X86/vselect-2.ll | 53 |
1 files changed, 40 insertions, 13 deletions
diff --git a/test/CodeGen/X86/vselect-2.ll b/test/CodeGen/X86/vselect-2.ll index 50da32c..fe4cfba 100644 --- a/test/CodeGen/X86/vselect-2.ll +++ b/test/CodeGen/X86/vselect-2.ll @@ -1,33 +1,60 @@ -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41 define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) { +; SSE2-LABEL: test1: +; SSE2: # BB#0: +; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] +; SSE2-NEXT: movapd %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: test1: +; SSE41: # BB#0: +; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] +; SSE41-NEXT: retq %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x i32> %A, <4 x i32> %B ret <4 x i32> %select } -; CHECK-LABEL: test1 -; CHECK: movsd -; CHECK: ret define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) { +; SSE2-LABEL: test2: +; SSE2: # BB#0: +; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] +; SSE2-NEXT: retq +; +; SSE41-LABEL: test2: +; SSE41: # BB#0: +; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] +; SSE41-NEXT: retq %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x i32> %A, <4 x i32> %B ret <4 x i32> %select } -; CHECK-LABEL: test2 -; CHECK: movsd -; CHECK-NEXT: ret define <4 x float> @test3(<4 x float> %A, <4 x float> %B) { +; SSE2-LABEL: test3: +; SSE2: # BB#0: +; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] +; SSE2-NEXT: movapd %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: test3: +; SSE41: # BB#0: +; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1] +; SSE41-NEXT: retq %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x float> %A, <4 x float> %B ret <4 x float> %select } -; CHECK-LABEL: test3 -; CHECK: movsd -; CHECK: ret define <4 x float> @test4(<4 x float> %A, <4 x float> %B) { +; SSE2-LABEL: test4: +; SSE2: # BB#0: +; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] +; SSE2-NEXT: retq +; +; SSE41-LABEL: test4: +; SSE41: # BB#0: +; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1] +; SSE41-NEXT: retq %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x float> %A, <4 x float> %B ret <4 x float> %select } -; CHECK-LABEL: test4 -; CHECK: movsd -; CHECK-NEXT: ret |