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author | Shih-wei Liao <sliao@google.com> | 2010-02-10 11:10:31 -0800 |
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committer | Shih-wei Liao <sliao@google.com> | 2010-02-10 11:10:31 -0800 |
commit | e264f62ca09a8f65c87a46d562a4d0f9ec5d457e (patch) | |
tree | 59e3d57ef656cef79afa708ae0a3daf25cd91fcf /test/CodeGen/X86/vshift-4.ll | |
download | external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.zip external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.tar.gz external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.tar.bz2 |
Check in LLVM r95781.
Diffstat (limited to 'test/CodeGen/X86/vshift-4.ll')
-rw-r--r-- | test/CodeGen/X86/vshift-4.ll | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll new file mode 100644 index 0000000..9773cbe --- /dev/null +++ b/test/CodeGen/X86/vshift-4.ll @@ -0,0 +1,85 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s + +; test vector shifts converted to proper SSE2 vector shifts when the shift +; amounts are the same when using a shuffle splat. + +define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { +entry: +; CHECK: shift1a: +; CHECK: psllq + %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0> + %shl = shl <2 x i64> %val, %shamt + store <2 x i64> %shl, <2 x i64>* %dst + ret void +} + +; shift1b can't use a packed shift +define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { +entry: +; CHECK: shift1b: +; CHECK: shll + %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1> + %shl = shl <2 x i64> %val, %shamt + store <2 x i64> %shl, <2 x i64>* %dst + ret void +} + +define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { +entry: +; CHECK: shift2a: +; CHECK: pslld + %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> + %shl = shl <4 x i32> %val, %shamt + store <4 x i32> %shl, <4 x i32>* %dst + ret void +} + +define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { +entry: +; CHECK: shift2b: +; CHECK: pslld + %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1> + %shl = shl <4 x i32> %val, %shamt + store <4 x i32> %shl, <4 x i32>* %dst + ret void +} + +define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { +entry: +; CHECK: shift2c: +; CHECK: pslld + %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> + %shl = shl <4 x i32> %val, %shamt + store <4 x i32> %shl, <4 x i32>* %dst + ret void +} + +define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind { +entry: +; CHECK: shift3a: +; CHECK: movzwl +; CHECK: psllw + %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> + %shl = shl <8 x i16> %val, %shamt + store <8 x i16> %shl, <8 x i16>* %dst + ret void +} + +define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { +entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: psllw + %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 + %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 + %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 + %3 = insertelement <8 x i16> %0, i16 %amt, i32 3 + %4 = insertelement <8 x i16> %0, i16 %amt, i32 4 + %5 = insertelement <8 x i16> %0, i16 %amt, i32 5 + %6 = insertelement <8 x i16> %0, i16 %amt, i32 6 + %7 = insertelement <8 x i16> %0, i16 %amt, i32 7 + %shl = shl <8 x i16> %val, %7 + store <8 x i16> %shl, <8 x i16>* %dst + ret void +} + |