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author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/ExecutionEngine/OrcJIT/2003-08-23-RegisterAllocatePhysReg.ll | |
parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/ExecutionEngine/OrcJIT/2003-08-23-RegisterAllocatePhysReg.ll')
-rw-r--r-- | test/ExecutionEngine/OrcJIT/2003-08-23-RegisterAllocatePhysReg.ll | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/test/ExecutionEngine/OrcJIT/2003-08-23-RegisterAllocatePhysReg.ll b/test/ExecutionEngine/OrcJIT/2003-08-23-RegisterAllocatePhysReg.ll new file mode 100644 index 0000000..bd26c38 --- /dev/null +++ b/test/ExecutionEngine/OrcJIT/2003-08-23-RegisterAllocatePhysReg.ll @@ -0,0 +1,34 @@ +; RUN: %lli -use-orcmcjit %s > /dev/null + +; This testcase exposes a bug in the local register allocator where it runs out +; of registers (due to too many overlapping live ranges), but then attempts to +; use the ESP register (which is not allocatable) to hold a value. + +define i32 @main(i32 %A) { + ; ESP gets used again... + %Ap2 = alloca i32, i32 %A ; <i32*> [#uses=11] + ; Produce lots of overlapping live ranges + %B = add i32 %A, 1 ; <i32> [#uses=1] + %C = add i32 %A, 2 ; <i32> [#uses=1] + %D = add i32 %A, 3 ; <i32> [#uses=1] + %E = add i32 %A, 4 ; <i32> [#uses=1] + %F = add i32 %A, 5 ; <i32> [#uses=1] + %G = add i32 %A, 6 ; <i32> [#uses=1] + %H = add i32 %A, 7 ; <i32> [#uses=1] + %I = add i32 %A, 8 ; <i32> [#uses=1] + %J = add i32 %A, 9 ; <i32> [#uses=1] + %K = add i32 %A, 10 ; <i32> [#uses=1] + ; Uses of all of the values + store i32 %A, i32* %Ap2 + store i32 %B, i32* %Ap2 + store i32 %C, i32* %Ap2 + store i32 %D, i32* %Ap2 + store i32 %E, i32* %Ap2 + store i32 %F, i32* %Ap2 + store i32 %G, i32* %Ap2 + store i32 %H, i32* %Ap2 + store i32 %I, i32* %Ap2 + store i32 %J, i32* %Ap2 + store i32 %K, i32* %Ap2 + ret i32 0 +} |