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author | Stephen Hines <srhines@google.com> | 2014-04-23 16:57:46 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2014-04-24 15:53:16 -0700 |
commit | 36b56886974eae4f9c5ebc96befd3e7bfe5de338 (patch) | |
tree | e6cfb69fbbd937f450eeb83bfb83b9da3b01275a /test/Feature | |
parent | 69a8640022b04415ae9fac62f8ab090601d8f889 (diff) | |
download | external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.zip external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.gz external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.bz2 |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
Diffstat (limited to 'test/Feature')
-rw-r--r-- | test/Feature/aliases.ll | 8 | ||||
-rw-r--r-- | test/Feature/intrinsic-noduplicate.ll | 9 | ||||
-rw-r--r-- | test/Feature/intrinsics.ll | 5 | ||||
-rw-r--r-- | test/Feature/linker_private_linkages.ll | 6 | ||||
-rw-r--r-- | test/Feature/optnone-llc.ll | 54 | ||||
-rw-r--r-- | test/Feature/optnone-opt.ll | 74 |
6 files changed, 144 insertions, 12 deletions
diff --git a/test/Feature/aliases.ll b/test/Feature/aliases.ll index 1393812..7fe9d0b 100644 --- a/test/Feature/aliases.ll +++ b/test/Feature/aliases.ll @@ -4,15 +4,17 @@ @llvm.used = appending global [1 x i8*] [i8* bitcast (i32* @foo1 to i8*)], section "llvm.metadata" -@bar = external global i32 +@bar = global i32 0 @foo1 = alias i32* @bar @foo2 = alias i32* @bar @foo3 = alias i32* @foo2 %FunTy = type i32() -declare i32 @foo_f() -@bar_f = alias weak %FunTy* @foo_f +define i32 @foo_f() { + ret i32 0 +} +@bar_f = alias weak_odr %FunTy* @foo_f @bar_ff = alias i32()* @bar_f @bar_i = alias internal i32* @bar diff --git a/test/Feature/intrinsic-noduplicate.ll b/test/Feature/intrinsic-noduplicate.ll new file mode 100644 index 0000000..9a2b0ab --- /dev/null +++ b/test/Feature/intrinsic-noduplicate.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s + +; Make sure LLVM knows about the noduplicate attribute on the +; llvm.cuda.syncthreads intrinsic. + +declare void @llvm.cuda.syncthreads() + +; CHECK: declare void @llvm.cuda.syncthreads() #[[ATTRNUM:[0-9]+]] +; CHECK: attributes #[[ATTRNUM]] = { noduplicate nounwind } diff --git a/test/Feature/intrinsics.ll b/test/Feature/intrinsics.ll index 28be053..278cb95 100644 --- a/test/Feature/intrinsics.ll +++ b/test/Feature/intrinsics.ll @@ -61,7 +61,7 @@ define void @libm() { ; FIXME: test ALL the intrinsics in this file. ; rdar://11542750 -; CHECK: declare void @llvm.trap() #2 +; CHECK: declare void @llvm.trap() #1 declare void @llvm.trap() define void @trap() { @@ -70,5 +70,4 @@ define void @trap() { } ; CHECK: attributes #0 = { nounwind readnone } -; CHECK: attributes #1 = { nounwind readonly } -; CHECK: attributes #2 = { noreturn nounwind } +; CHECK: attributes #1 = { noreturn nounwind } diff --git a/test/Feature/linker_private_linkages.ll b/test/Feature/linker_private_linkages.ll deleted file mode 100644 index 19bcbb4..0000000 --- a/test/Feature/linker_private_linkages.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llvm-as < %s | llvm-dis > %t1.ll -; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll -; RUN: diff %t1.ll %t2.ll - -@foo = linker_private hidden global i32 0 -@bar = linker_private_weak hidden global i32 0 diff --git a/test/Feature/optnone-llc.ll b/test/Feature/optnone-llc.ll new file mode 100644 index 0000000..6cb27d0 --- /dev/null +++ b/test/Feature/optnone-llc.ll @@ -0,0 +1,54 @@ +; RUN: llc -O0 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-O0 +; RUN: llc -O1 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox +; RUN: llc -O2 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox +; RUN: llc -O3 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox +; RUN: llc -misched-postra -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-MORE + +; REQUIRES: asserts + +; This test verifies that we don't run Machine Function optimizations +; on optnone functions. + +; Function Attrs: noinline optnone +define i32 @_Z3fooi(i32 %x) #0 { +entry: + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + br label %while.cond + +while.cond: ; preds = %while.body, %entry + %0 = load i32* %x.addr, align 4 + %dec = add nsw i32 %0, -1 + store i32 %dec, i32* %x.addr, align 4 + %tobool = icmp ne i32 %0, 0 + br i1 %tobool, label %while.body, label %while.end + +while.body: ; preds = %while.cond + br label %while.cond + +while.end: ; preds = %while.cond + ret i32 0 +} + +attributes #0 = { optnone noinline } + +; Nothing that runs at -O0 gets skipped. +; LLC-O0-NOT: Skipping pass + +; Machine Function passes run at -O1 and higher. +; LLC-Ox-DAG: Skipping pass 'Branch Probability Basic Block Placement' +; LLC-Ox-DAG: Skipping pass 'CodeGen Prepare' +; LLC-Ox-DAG: Skipping pass 'Control Flow Optimizer' +; LLC-Ox-DAG: Skipping pass 'Machine code sinking' +; LLC-Ox-DAG: Skipping pass 'Machine Common Subexpression Elimination' +; LLC-Ox-DAG: Skipping pass 'Machine Copy Propagation Pass' +; LLC-Ox-DAG: Skipping pass 'Machine Loop Invariant Code Motion' +; LLC-Ox-DAG: Skipping pass 'Merge disjoint stack slots' +; LLC-Ox-DAG: Skipping pass 'Optimize machine instruction PHIs' +; LLC-Ox-DAG: Skipping pass 'Peephole Optimizations' +; LLC-Ox-DAG: Skipping pass 'Post RA top-down list latency scheduler' +; LLC-Ox-DAG: Skipping pass 'Remove dead machine instructions' +; LLC-Ox-DAG: Skipping pass 'Tail Duplication' + +; Alternate post-RA scheduler. +; LLC-MORE: Skipping pass 'PostRA Machine Instruction Scheduler' diff --git a/test/Feature/optnone-opt.ll b/test/Feature/optnone-opt.ll new file mode 100644 index 0000000..f83e68c --- /dev/null +++ b/test/Feature/optnone-opt.ll @@ -0,0 +1,74 @@ +; RUN: opt -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O0 +; RUN: opt -O1 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 +; RUN: opt -O2 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 --check-prefix=OPT-O2O3 +; RUN: opt -O3 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 --check-prefix=OPT-O2O3 +; RUN: opt -bb-vectorize -dce -die -loweratomic -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-MORE +; RUN: opt -indvars -licm -loop-deletion -loop-extract -loop-idiom -loop-instsimplify -loop-reduce -loop-reroll -loop-rotate -loop-unroll -loop-unswitch -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-LOOP + +; REQUIRES: asserts + +; This test verifies that we don't run target independent IR-level +; optimizations on optnone functions. + +; Function Attrs: noinline optnone +define i32 @_Z3fooi(i32 %x) #0 { +entry: + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + br label %while.cond + +while.cond: ; preds = %while.body, %entry + %0 = load i32* %x.addr, align 4 + %dec = add nsw i32 %0, -1 + store i32 %dec, i32* %x.addr, align 4 + %tobool = icmp ne i32 %0, 0 + br i1 %tobool, label %while.body, label %while.end + +while.body: ; preds = %while.cond + br label %while.cond + +while.end: ; preds = %while.cond + ret i32 0 +} + +attributes #0 = { optnone noinline } + +; Nothing that runs at -O0 gets skipped. +; OPT-O0-NOT: Skipping pass + +; IR passes run at -O1 and higher. +; OPT-O1-DAG: Skipping pass 'Aggressive Dead Code Elimination' +; OPT-O1-DAG: Skipping pass 'Combine redundant instructions' +; OPT-O1-DAG: Skipping pass 'Dead Store Elimination' +; OPT-O1-DAG: Skipping pass 'Early CSE' +; OPT-O1-DAG: Skipping pass 'Jump Threading' +; OPT-O1-DAG: Skipping pass 'MemCpy Optimization' +; OPT-O1-DAG: Skipping pass 'Reassociate expressions' +; OPT-O1-DAG: Skipping pass 'Simplify the CFG' +; OPT-O1-DAG: Skipping pass 'Sparse Conditional Constant Propagation' +; OPT-O1-DAG: Skipping pass 'SROA' +; OPT-O1-DAG: Skipping pass 'Tail Call Elimination' +; OPT-O1-DAG: Skipping pass 'Value Propagation' + +; Additional IR passes run at -O2 and higher. +; OPT-O2O3-DAG: Skipping pass 'Global Value Numbering' +; OPT-O2O3-DAG: Skipping pass 'SLP Vectorizer' + +; Additional IR passes that opt doesn't turn on by default. +; OPT-MORE-DAG: Skipping pass 'Basic-Block Vectorization' +; OPT-MORE-DAG: Skipping pass 'Dead Code Elimination' +; OPT-MORE-DAG: Skipping pass 'Dead Instruction Elimination' +; OPT-MORE-DAG: Skipping pass 'Lower atomic intrinsics + +; Loop IR passes that opt doesn't turn on by default. +; OPT-LOOP-DAG: Skipping pass 'Delete dead loops' +; OPT-LOOP-DAG: Skipping pass 'Extract loops into new functions' +; OPT-LOOP-DAG: Skipping pass 'Induction Variable Simplification' +; OPT-LOOP-DAG: Skipping pass 'Loop Invariant Code Motion' +; OPT-LOOP-DAG: Skipping pass 'Loop Strength Reduction' +; OPT-LOOP-DAG: Skipping pass 'Recognize loop idioms' +; OPT-LOOP-DAG: Skipping pass 'Reroll loops' +; OPT-LOOP-DAG: Skipping pass 'Rotate Loops' +; OPT-LOOP-DAG: Skipping pass 'Simplify instructions in loops' +; OPT-LOOP-DAG: Skipping pass 'Unroll loops' +; OPT-LOOP-DAG: Skipping pass 'Unswitch loops' |