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| author | David Greene <greened@obbligato.org> | 2011-10-07 18:25:05 +0000 |
|---|---|---|
| committer | David Greene <greened@obbligato.org> | 2011-10-07 18:25:05 +0000 |
| commit | a1b1b79be15c4b79a4282f148085ebad1cf877ca (patch) | |
| tree | ebcc9a679f17963bd672a734ffd0fce3d66f290c /test/TableGen | |
| parent | 67370ef9030990baceb42181f2db57b7b8d33ca9 (diff) | |
| download | external_llvm-a1b1b79be15c4b79a4282f148085ebad1cf877ca.zip external_llvm-a1b1b79be15c4b79a4282f148085ebad1cf877ca.tar.gz external_llvm-a1b1b79be15c4b79a4282f148085ebad1cf877ca.tar.bz2 | |
Remove Multidefs
Multidefs are a bit unwieldy and incomplete. Remove them in favor of
another mechanism, probably for loops.
Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141378 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/TableGen')
| -rw-r--r-- | test/TableGen/MultiDef.td | 18 | ||||
| -rw-r--r-- | test/TableGen/MultiPat.td | 38 |
2 files changed, 9 insertions, 47 deletions
diff --git a/test/TableGen/MultiDef.td b/test/TableGen/MultiDef.td deleted file mode 100644 index f4527ac..0000000 --- a/test/TableGen/MultiDef.td +++ /dev/null @@ -1,18 +0,0 @@ -// RUN: llvm-tblgen %s | FileCheck %s -// RUN: llvm-tblgen %s | FileCheck %s - -class Base<int i> { - int value = i; -} - -multiclass Multi<list<int> values> { - def ONE : Base<values[0]>; - def TWO : Base<values[1]>; - - multidef COUNT<values, int v, 2> : Base<v>; -} - -defm List : Multi<[1, 2, 3, 4, 5, 6]>; - -// CHECK: MD4.ListCOUNT -// CHECK: int value = 6 diff --git a/test/TableGen/MultiPat.td b/test/TableGen/MultiPat.td index 91767dc..b49b06c 100644 --- a/test/TableGen/MultiPat.td +++ b/test/TableGen/MultiPat.td @@ -83,21 +83,10 @@ def Decls : decls; // Define intrinsics def int_x86_sse2_add_ps : Intrinsic<"addps">; def int_x86_sse2_add_pd : Intrinsic<"addpd">; -def int_x86_sse2_sub_ps : Intrinsic<"subps">; -def int_x86_sse2_sub_pd : Intrinsic<"subpd">; def INTRINSIC : Intrinsic<"Dummy">; def bitconvert; -def add; -def sub; - -class MakePatImpl<list<dag> patterns> : Pat<patterns[0], patterns[1]>; -class MakePat<list<dag> patterns, - string suffix, - string intr> : MakePatImpl<!foreach(Decls.pattern, patterns, - !foreach(Decls.operand, Decls.pattern, - !subst(INTRINSIC, !cast<Intrinsic>(!subst("SUFFIX", suffix, intr)), - !subst(REGCLASS, VR128, - !subst(MNEMONIC, set, Decls.operand)))))>; + +class MakePat<list<dag> patterns> : Pat<patterns[0], patterns[1]>; class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr, list<list<dag>> patterns> @@ -106,7 +95,12 @@ class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr, !foreach(Decls.operand, Decls.pattern, !subst(INTRINSIC, intr, !subst(REGCLASS, VR128, - !subst(MNEMONIC, set, Decls.operand)))))>; + !subst(MNEMONIC, set, Decls.operand)))))>, + MakePat<!foreach(Decls.pattern, patterns[1], + !foreach(Decls.operand, Decls.pattern, + !subst(INTRINSIC, intr, + !subst(REGCLASS, VR128, + !subst(MNEMONIC, set, Decls.operand)))))>; multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> patterns> { def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), @@ -114,27 +108,13 @@ multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> pat def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), !strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)), patterns>; - - multidef <patterns, list<dag> pats, 1> : MakePat<pats, "_ps", intr>; - multidef <patterns, list<dag> pats, 1> : MakePat<pats, "_pd", intr>; } defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX", // rr Patterns [[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))], [(set REGCLASS:$dst, (bitconvert (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))), - (MNEMONIC REGCLASS:$dst, REGCLASS:$src)], - [(set REGCLASS:$dst, (add (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))), - (MNEMONIC (add REGCLASS:$dst, REGCLASS:$src))]]>; + (MNEMONIC REGCLASS:$dst, REGCLASS:$src)]]>; // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))] // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))] -// CHECK: (set VR128:$dst, (add (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))) -// CHECK: (set VR128:$dst, (add (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))) - -defm SUB : arith<0x59, "sub", "int_x86_sse2_subSUFFIX", - // rr Patterns - [[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))]]>; - -// CHECK: [(set VR128:$dst, (int_x86_sse2_sub_pd VR128:$src1, VR128:$src2))] -// CHECK: [(set VR128:$dst, (int_x86_sse2_sub_ps VR128:$src1, VR128:$src2))] |