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authorStephen Hines <srhines@google.com>2014-04-23 16:57:46 -0700
committerStephen Hines <srhines@google.com>2014-04-24 15:53:16 -0700
commit36b56886974eae4f9c5ebc96befd3e7bfe5de338 (patch)
treee6cfb69fbbd937f450eeb83bfb83b9da3b01275a /test/Transforms/LoopUnroll/X86
parent69a8640022b04415ae9fac62f8ab090601d8f889 (diff)
downloadexternal_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.zip
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Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
Diffstat (limited to 'test/Transforms/LoopUnroll/X86')
-rw-r--r--test/Transforms/LoopUnroll/X86/lit.local.cfg4
-rw-r--r--test/Transforms/LoopUnroll/X86/partial.ll80
2 files changed, 84 insertions, 0 deletions
diff --git a/test/Transforms/LoopUnroll/X86/lit.local.cfg b/test/Transforms/LoopUnroll/X86/lit.local.cfg
new file mode 100644
index 0000000..ba763cf
--- /dev/null
+++ b/test/Transforms/LoopUnroll/X86/lit.local.cfg
@@ -0,0 +1,4 @@
+targets = set(config.root.targets_to_build.split())
+if not 'X86' in targets:
+ config.unsupported = True
+
diff --git a/test/Transforms/LoopUnroll/X86/partial.ll b/test/Transforms/LoopUnroll/X86/partial.ll
new file mode 100644
index 0000000..15867cb
--- /dev/null
+++ b/test/Transforms/LoopUnroll/X86/partial.ll
@@ -0,0 +1,80 @@
+; RUN: opt < %s -S -loop-unroll -mcpu=nehalem -x86-use-partial-unrolling=1 | FileCheck %s
+; RUN: opt < %s -S -loop-unroll -mcpu=core -x86-use-partial-unrolling=1 | FileCheck -check-prefix=CHECK-NOUNRL %s
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @foo(i32* noalias nocapture readnone %ip, double %alpha, double* noalias nocapture %a, double* noalias nocapture readonly %b) #0 {
+entry:
+ br label %vector.body
+
+vector.body: ; preds = %vector.body, %entry
+ %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
+ %0 = getelementptr inbounds double* %b, i64 %index
+ %1 = bitcast double* %0 to <2 x double>*
+ %wide.load = load <2 x double>* %1, align 8
+ %.sum9 = or i64 %index, 2
+ %2 = getelementptr double* %b, i64 %.sum9
+ %3 = bitcast double* %2 to <2 x double>*
+ %wide.load8 = load <2 x double>* %3, align 8
+ %4 = fadd <2 x double> %wide.load, <double 1.000000e+00, double 1.000000e+00>
+ %5 = fadd <2 x double> %wide.load8, <double 1.000000e+00, double 1.000000e+00>
+ %6 = getelementptr inbounds double* %a, i64 %index
+ %7 = bitcast double* %6 to <2 x double>*
+ store <2 x double> %4, <2 x double>* %7, align 8
+ %.sum10 = or i64 %index, 2
+ %8 = getelementptr double* %a, i64 %.sum10
+ %9 = bitcast double* %8 to <2 x double>*
+ store <2 x double> %5, <2 x double>* %9, align 8
+ %index.next = add i64 %index, 4
+ %10 = icmp eq i64 %index.next, 1600
+ br i1 %10, label %for.end, label %vector.body
+
+; FIXME: We should probably unroll this loop by a factor of 2, but the cost
+; model needs to be fixed to account for instructions likely to be folded
+; as part of an addressing mode.
+; CHECK-LABEL: @foo
+; CHECK-NOUNRL-LABEL: @foo
+
+for.end: ; preds = %vector.body
+ ret void
+}
+
+define void @bar(i32* noalias nocapture readnone %ip, double %alpha, double* noalias nocapture %a, double* noalias nocapture readonly %b) #0 {
+entry:
+ br label %vector.body
+
+vector.body: ; preds = %vector.body, %entry
+ %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
+ %v0 = getelementptr inbounds double* %b, i64 %index
+ %v1 = bitcast double* %v0 to <2 x double>*
+ %wide.load = load <2 x double>* %v1, align 8
+ %v4 = fadd <2 x double> %wide.load, <double 1.000000e+00, double 1.000000e+00>
+ %v5 = fmul <2 x double> %v4, <double 8.000000e+00, double 8.000000e+00>
+ %v6 = getelementptr inbounds double* %a, i64 %index
+ %v7 = bitcast double* %v6 to <2 x double>*
+ store <2 x double> %v5, <2 x double>* %v7, align 8
+ %index.next = add i64 %index, 2
+ %v10 = icmp eq i64 %index.next, 1600
+ br i1 %v10, label %for.end, label %vector.body
+
+; FIXME: We should probably unroll this loop by a factor of 2, but the cost
+; model needs to first to fixed to account for instructions likely to be folded
+; as part of an addressing mode.
+
+; CHECK-LABEL: @bar
+; CHECK: fadd
+; CHECK-NEXT: fmul
+; CHECK: fadd
+; CHECK-NEXT: fmul
+
+; CHECK-NOUNRL-LABEL: @bar
+; CHECK-NOUNRL: fadd
+; CHECK-NOUNRL-NEXT: fmul
+; CHECK-NOUNRL-NOT: fadd
+
+for.end: ; preds = %vector.body
+ ret void
+}
+
+attributes #0 = { nounwind uwtable }
+