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authorBenjamin Kramer <benny.kra@googlemail.com>2013-05-10 14:09:52 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2013-05-10 14:09:52 +0000
commit768ebcdf631baa1b18dc65a5983a237b307a99c2 (patch)
treef15c5d03fd7d8385fa12f56be297f252b2ab785f /test
parent51dab6e3945a6d06a713869967ced3a8f9fb6294 (diff)
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DAGCombiner: Generate a correct constant for vector types when folding (xor (and)) into (and (not)).
PR15948. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/xor.ll11
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll
index 2408bfe..574bb78 100644
--- a/test/CodeGen/X86/xor.ll
+++ b/test/CodeGen/X86/xor.ll
@@ -154,3 +154,14 @@ define i32 @test9(i32 %a) nounwind {
; X32: notl [[REG:%[a-z]+]]
; X32: andl {{.*}}[[REG:%[a-z]+]]
}
+
+; PR15948
+define <4 x i32> @test10(<4 x i32> %a) nounwind {
+ %1 = and <4 x i32> %a, <i32 4096, i32 4096, i32 4096, i32 4096>
+ %2 = xor <4 x i32> %1, <i32 4096, i32 4096, i32 4096, i32 4096>
+ ret <4 x i32> %2
+; X64: test10:
+; X64: andnps
+; X32: test10:
+; X32: andnps
+}