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| author | Bill Wendling <isanbard@gmail.com> | 2013-11-26 11:16:52 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-11-26 11:16:52 +0000 |
| commit | 876f8f123e9a52bf8e970f9e04b93700380b5dbf (patch) | |
| tree | 99341579c7ea1e51de0faa8d1482ad271a3c0109 /test | |
| parent | 1184bebd31edac189a2c129ba93795b66cf4876d (diff) | |
| download | external_llvm-876f8f123e9a52bf8e970f9e04b93700380b5dbf.zip external_llvm-876f8f123e9a52bf8e970f9e04b93700380b5dbf.tar.gz external_llvm-876f8f123e9a52bf8e970f9e04b93700380b5dbf.tar.bz2 | |
Merging r195444:
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r195444 | dsanders | 2013-11-22 03:24:50 -0800 (Fri, 22 Nov 2013) | 4 lines
[mips][msa] Float vector constants cannot use ldi.[wd] directly. Bitcast from the appropriate integer vector type.
Fixes an instruction selection failure detected by llvm-stress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195742 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Mips/msa/llvm-stress-s2501752154-simplified.ll | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/msa/llvm-stress-s2501752154-simplified.ll b/test/CodeGen/Mips/msa/llvm-stress-s2501752154-simplified.ll new file mode 100644 index 0000000..564ad74 --- /dev/null +++ b/test/CodeGen/Mips/msa/llvm-stress-s2501752154-simplified.ll @@ -0,0 +1,27 @@ +; RUN: llc -march=mips < %s +; RUN: llc -march=mips -mattr=+msa,+fp64 < %s +; RUN: llc -march=mipsel < %s +; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s + +; This test originally failed for MSA with a "Cannot select ..." error. +; This happened because the legalizer treated undef's in the <4 x float> +; constant as equivalent to the defined elements when checking if it a constant +; splat, but then proceeded to legalize the undef's to zero, leaving it as a +; non-splat that cannot be selected. It should have eliminated the undef's by +; rewriting the splat constant. + +; It should at least successfully build. + +define void @autogen_SD2501752154() { +BB: + %BC = bitcast <4 x i32> <i32 -1, i32 -1, i32 undef, i32 undef> to <4 x float> + br label %CF74 + +CF74: ; preds = %CF74, %CF + %E54 = extractelement <1 x i1> undef, i32 0 + br i1 %E54, label %CF74, label %CF79 + +CF79: ; preds = %CF75 + %I63 = insertelement <4 x float> %BC, float undef, i32 0 + ret void +} |