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author | Daniel Dunbar <daniel@zuster.org> | 2009-09-05 11:34:53 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2009-09-05 11:34:53 +0000 |
commit | 8c042c2337948e5a6051f34a2d6263fe19737e14 (patch) | |
tree | 058956544cbfaf03a1798e3bf876cc75b4041a39 /tools/opt | |
parent | 31dc49d5ab3cc91809f996178a9b01e22481cbe9 (diff) | |
download | external_llvm-8c042c2337948e5a6051f34a2d6263fe19737e14.zip external_llvm-8c042c2337948e5a6051f34a2d6263fe19737e14.tar.gz external_llvm-8c042c2337948e5a6051f34a2d6263fe19737e14.tar.bz2 |
opt: Add -S option to print output as LLVM assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81082 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'tools/opt')
-rw-r--r-- | tools/opt/opt.cpp | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/tools/opt/opt.cpp b/tools/opt/opt.cpp index b1f5c08..e470066 100644 --- a/tools/opt/opt.cpp +++ b/tools/opt/opt.cpp @@ -66,6 +66,10 @@ NoOutput("disable-output", cl::desc("Do not write result bitcode file"), cl::Hidden); static cl::opt<bool> +OutputAssembly("S", + cl::desc("Write output as LLVM assembly"), cl::Hidden); + +static cl::opt<bool> NoVerify("disable-verify", cl::desc("Do not verify result module"), cl::Hidden); static cl::opt<bool> @@ -375,8 +379,9 @@ int main(int argc, char **argv) { // If the output is set to be emitted to standard out, and standard out is a // console, print out a warning message and refuse to do it. We don't // impress anyone by spewing tons of binary goo to a terminal. - if (!Force && !NoOutput && CheckBitcodeOutputToConsole(*Out, !Quiet)) - NoOutput = true; + if (!Force && !NoOutput && !OutputAssembly) + if (CheckBitcodeOutputToConsole(*Out, !Quiet)) + NoOutput = true; // Create a PassManager to hold and optimize the collection of passes we are // about to build... @@ -495,9 +500,13 @@ int main(int argc, char **argv) { if (!NoVerify && !VerifyEach) Passes.add(createVerifierPass()); - // Write bitcode out to disk or outs() as the last step... - if (!NoOutput && !AnalyzeOnly) - Passes.add(createBitcodeWriterPass(*Out)); + // Write bitcode or assembly out to disk or outs() as the last step... + if (!NoOutput && !AnalyzeOnly) { + if (OutputAssembly) + Passes.add(createPrintModulePass(Out)); + else + Passes.add(createBitcodeWriterPass(*Out)); + } // Now that we have all of the passes ready, run them. Passes.run(*M.get()); |