summaryrefslogtreecommitdiffstats
path: root/utils/TableGen/AsmWriterEmitter.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-10-04 15:28:08 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-10-04 15:28:08 +0000
commit6fea31e7300fe012b0b2984d6bc0338d02b054d3 (patch)
tree3301c3b43d565f885ecd7ce1e132629358884b10 /utils/TableGen/AsmWriterEmitter.cpp
parent877b6d43d4183e7b4bb6c99038c0d2b184dd3b3c (diff)
downloadexternal_llvm-6fea31e7300fe012b0b2984d6bc0338d02b054d3.zip
external_llvm-6fea31e7300fe012b0b2984d6bc0338d02b054d3.tar.gz
external_llvm-6fea31e7300fe012b0b2984d6bc0338d02b054d3.tar.bz2
TableGen: Privatize CodeGenRegisterClass::TheDef and Name.
When TableGen starts creating its own register classes, the synthesized classes won't have a Record reference. All register classes must have a name, though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141081 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/AsmWriterEmitter.cpp')
-rw-r--r--utils/TableGen/AsmWriterEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index bb91cd0..3123e11 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -712,7 +712,7 @@ void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) {
// Emit the register enum value for each RegisterClass.
for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) {
if (I != 0) O << ",\n";
- O << " RC_" << RegisterClasses[I]->TheDef->getName();
+ O << " RC_" << RegisterClasses[I]->getName();
}
O << "\n };\n";
@@ -732,7 +732,7 @@ void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) {
const CodeGenRegisterClass &RC = *RegisterClasses[I];
// Give the register class a legal C name if it's anonymous.
- std::string Name = RC.TheDef->getName();
+ std::string Name = RC.getName();
O << " case RC_" << Name << ":\n";
// Emit the register list now.