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author | Chris Lattner <sabre@nondot.org> | 2006-07-19 01:39:06 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-07-19 01:39:06 +0000 |
commit | a6dc9fb745962564fac3b18da28736b2e094c417 (patch) | |
tree | 79236a188848ed3f3daea9776bf781474527edb2 /utils | |
parent | 08e682ecf486a26ffe202d072b98d748193d1f21 (diff) | |
download | external_llvm-a6dc9fb745962564fac3b18da28736b2e094c417.zip external_llvm-a6dc9fb745962564fac3b18da28736b2e094c417.tar.gz external_llvm-a6dc9fb745962564fac3b18da28736b2e094c417.tar.bz2 |
Fix a bug handling instructions, like blr, which just consist of a text
string. The return value of printInstruction should be true for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/AsmWriterEmitter.cpp | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 2cf16e7..02773d2 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -478,7 +478,7 @@ void AsmWriterEmitter::run(std::ostream &O) { // Build an aggregate string, and build a table of offsets into it. std::map<std::string, unsigned> StringOffset; std::string AggregateString; - AggregateString += '\0'; + AggregateString += "\0\0"; /// OpcodeInfo - Theis encodes the index of the string to use for the first /// chunk of the output as well as indices used for operand printing. @@ -488,9 +488,14 @@ void AsmWriterEmitter::run(std::ostream &O) { for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions[i]]; unsigned Idx; - if (AWI == 0 || AWI->Operands[0].Str.empty()) { + if (AWI == 0) { // Something not handled by the asmwriter printer. Idx = 0; + } else if (AWI->Operands[0].OperandType != + AsmWriterOperand::isLiteralTextOperand || + AWI->Operands[0].Str.empty()) { + // Something handled by the asmwriter printer, but with no leading string. + Idx = 1; } else { unsigned &Entry = StringOffset[AWI->Operands[0].Str]; if (Entry == 0) { @@ -522,10 +527,10 @@ void AsmWriterEmitter::run(std::ostream &O) { while (1) { std::vector<std::string> UniqueOperandCommands; - // For the first operand check, add a default value that unhandled - // instructions will use. + // For the first operand check, add a default value for instructions with + // just opcode strings to use. if (isFirst) { - UniqueOperandCommands.push_back(" return false;\n"); + UniqueOperandCommands.push_back(" return true;\n"); isFirst = false; } @@ -618,6 +623,7 @@ void AsmWriterEmitter::run(std::ostream &O) { O << " // Emit the opcode for the instruction.\n" << " unsigned Bits = OpInfo[MI->getOpcode()];\n" + << " if (Bits == 0) return false;\n" << " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n"; // Output the table driven operand information. |