diff options
| -rw-r--r-- | Makefile.rules | 7 | ||||
| -rw-r--r-- | include/llvm/Target/Target.td (renamed from lib/Target/Target.td) | 6 | ||||
| -rw-r--r-- | include/llvm/Target/TargetCallingConv.td (renamed from lib/Target/TargetCallingConv.td) | 0 | ||||
| -rw-r--r-- | include/llvm/Target/TargetSchedule.td (renamed from lib/Target/TargetSchedule.td) | 0 | ||||
| -rw-r--r-- | include/llvm/Target/TargetSelectionDAG.td (renamed from lib/Target/TargetSelectionDAG.td) | 0 | ||||
| -rw-r--r-- | lib/Target/ARM/ARM.td | 2 | ||||
| -rw-r--r-- | lib/Target/Alpha/Alpha.td | 2 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPU.td | 2 | ||||
| -rw-r--r-- | lib/Target/IA64/IA64.td | 2 | ||||
| -rw-r--r-- | lib/Target/Mips/Mips.td | 2 | ||||
| -rw-r--r-- | lib/Target/PIC16/PIC16.td | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPC.td | 2 | ||||
| -rw-r--r-- | lib/Target/Sparc/Sparc.td | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86.td | 2 | ||||
| -rw-r--r-- | lib/Target/XCore/XCore.td | 2 |
15 files changed, 17 insertions, 16 deletions
diff --git a/Makefile.rules b/Makefile.rules index 849c70b..82a108e 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -1259,9 +1259,10 @@ $(ObjDir)/%.bc: %.ll $(ObjDir)/.dir $(LLVMAS) ifdef TARGET TDFiles := $(strip $(wildcard $(PROJ_SRC_DIR)/*.td) \ - $(LLVM_SRC_ROOT)/lib/Target/Target.td \ - $(LLVM_SRC_ROOT)/lib/Target/TargetCallingConv.td \ - $(LLVM_SRC_ROOT)/lib/Target/TargetSelectionDAG.td \ + $(LLVM_SRC_ROOT)/include/llvm/Target/Target.td \ + $(LLVM_SRC_ROOT)/include/llvm/Target/TargetCallingConv.td \ + $(LLVM_SRC_ROOT)/include/llvm/Target/TargetSchedule.td \ + $(LLVM_SRC_ROOT)/include/llvm/Target/TargetSelectionDAG.td \ $(LLVM_SRC_ROOT)/include/llvm/CodeGen/ValueTypes.td) \ $(wildcard $(LLVM_SRC_ROOT)/include/llvm/Intrinsics*.td) INCFiles := $(filter %.inc,$(BUILT_SOURCES)) diff --git a/lib/Target/Target.td b/include/llvm/Target/Target.td index e07529d..91e44f2 100644 --- a/lib/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -147,7 +147,7 @@ class DwarfRegNum<list<int> Numbers> { //===----------------------------------------------------------------------===// // Pull in the common support for scheduling // -include "TargetSchedule.td" +include "llvm/Target/TargetSchedule.td" class Predicate; // Forward def @@ -491,9 +491,9 @@ class Processor<string n, ProcessorItineraries pi, list<SubtargetFeature> f> { //===----------------------------------------------------------------------===// // Pull in the common support for calling conventions. // -include "TargetCallingConv.td" +include "llvm/Target/TargetCallingConv.td" //===----------------------------------------------------------------------===// // Pull in the common support for DAG isel generation. // -include "TargetSelectionDAG.td" +include "llvm/Target/TargetSelectionDAG.td" diff --git a/lib/Target/TargetCallingConv.td b/include/llvm/Target/TargetCallingConv.td index 908e16e..908e16e 100644 --- a/lib/Target/TargetCallingConv.td +++ b/include/llvm/Target/TargetCallingConv.td diff --git a/lib/Target/TargetSchedule.td b/include/llvm/Target/TargetSchedule.td index 38461c5..38461c5 100644 --- a/lib/Target/TargetSchedule.td +++ b/include/llvm/Target/TargetSchedule.td diff --git a/lib/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index c936f7a..c936f7a 100644 --- a/lib/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index 19e25d4..aca868f 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -14,7 +14,7 @@ // Target-independent interfaces which we are implementing //===----------------------------------------------------------------------===// -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // ARM Subtarget features. diff --git a/lib/Target/Alpha/Alpha.td b/lib/Target/Alpha/Alpha.td index 65a760b..e3748c6 100644 --- a/lib/Target/Alpha/Alpha.td +++ b/lib/Target/Alpha/Alpha.td @@ -12,7 +12,7 @@ // Get the target-independent interfaces which we are implementing... // -include "../Target.td" +include "llvm/Target/Target.td" //Alpha is little endian diff --git a/lib/Target/CellSPU/SPU.td b/lib/Target/CellSPU/SPU.td index 15809f2..a5db1d9 100644 --- a/lib/Target/CellSPU/SPU.td +++ b/lib/Target/CellSPU/SPU.td @@ -13,7 +13,7 @@ // Get the target-independent interfaces which we are implementing. // -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // Register File Description diff --git a/lib/Target/IA64/IA64.td b/lib/Target/IA64/IA64.td index 0cef72e..c469281 100644 --- a/lib/Target/IA64/IA64.td +++ b/lib/Target/IA64/IA64.td @@ -14,7 +14,7 @@ // Get the target-independent interfaces which we are implementing... // -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // Register File Description diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 79c1890..79ae5d2 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -13,7 +13,7 @@ // Target-independent interfaces //===----------------------------------------------------------------------===// -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // Register File, Calling Conv, Instruction Descriptions diff --git a/lib/Target/PIC16/PIC16.td b/lib/Target/PIC16/PIC16.td index d37075b..b2b9b1c 100644 --- a/lib/Target/PIC16/PIC16.td +++ b/lib/Target/PIC16/PIC16.td @@ -13,7 +13,7 @@ // Target-independent interfaces //===----------------------------------------------------------------------===// -include "../Target.td" +include "llvm/Target/Target.td" include "PIC16RegisterInfo.td" include "PIC16InstrInfo.td" diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index cc0c8c8..08f5bb4 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -13,7 +13,7 @@ // Get the target-independent interfaces which we are implementing. // -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // PowerPC Subtarget features. diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td index b90fcde..53ea8f4 100644 --- a/lib/Target/Sparc/Sparc.td +++ b/lib/Target/Sparc/Sparc.td @@ -14,7 +14,7 @@ // Target-independent interfaces which we are implementing //===----------------------------------------------------------------------===// -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // SPARC Subtarget features. diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index f70c175..6d08b36 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -14,7 +14,7 @@ // Get the target-independent interfaces which we are implementing... // -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // X86 Subtarget features. diff --git a/lib/Target/XCore/XCore.td b/lib/Target/XCore/XCore.td index 39c4226..7a2dcdb 100644 --- a/lib/Target/XCore/XCore.td +++ b/lib/Target/XCore/XCore.td @@ -14,7 +14,7 @@ // Target-independent interfaces which we are implementing //===----------------------------------------------------------------------===// -include "../Target.td" +include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // Descriptions |